diff options
author | Ben Zhang <benzh@chromium.org> | 2019-12-18 06:39:30 -0800 |
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committer | Mark Brown <broonie@kernel.org> | 2019-12-18 20:02:30 +0000 |
commit | 5b425814f13f373cf36d58cf1b418e075d45ad86 (patch) | |
tree | ad942c19a0355a364f61b015349e1f91913c5d7c /sound/soc/intel/boards/bdw-rt5650.c | |
parent | 068ac0db8637d3c188010ab8b9cc136f98fcd3df (diff) | |
download | linux-5b425814f13f373cf36d58cf1b418e075d45ad86.tar.bz2 |
ASoC: intel: Add Broadwell rt5650 machine driver
Add machine driver for Broadwell + rt5650.
Signed-off-by: Bard Liao <bardliao@realtek.com>
Signed-off-by: Ben Zhang <benzh@chromium.org>
Signed-off-by: Mac Chiang <mac.chiang@intel.com>
Signed-off-by: Jon Flatley <jflat@chromium.org>
Signed-off-by: Curtis Malainey <cujomalainey@chromium.org>
Acked-by: Pierre-Louis Bossart <pierre-louis.bossart@linux.intel.com>
Link: https://lore.kernel.org/r/20191218143937.122665-1-cujomalainey@chromium.org
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/intel/boards/bdw-rt5650.c')
-rw-r--r-- | sound/soc/intel/boards/bdw-rt5650.c | 319 |
1 files changed, 319 insertions, 0 deletions
diff --git a/sound/soc/intel/boards/bdw-rt5650.c b/sound/soc/intel/boards/bdw-rt5650.c new file mode 100644 index 000000000000..ba3fc1ef900a --- /dev/null +++ b/sound/soc/intel/boards/bdw-rt5650.c @@ -0,0 +1,319 @@ +// SPDX-License-Identifier: GPL-2.0-only +/* + * ASoC machine driver for Intel Broadwell platforms with RT5650 codec + * + * Copyright 2019, The Chromium OS Authors. All rights reserved. + */ + +#include <linux/delay.h> +#include <linux/gpio/consumer.h> +#include <linux/module.h> +#include <linux/platform_device.h> +#include <sound/core.h> +#include <sound/jack.h> +#include <sound/pcm.h> +#include <sound/pcm_params.h> +#include <sound/soc.h> +#include <sound/soc-acpi.h> + +#include "../common/sst-dsp.h" +#include "../haswell/sst-haswell-ipc.h" + +#include "../../codecs/rt5645.h" + +struct bdw_rt5650_priv { + struct gpio_desc *gpio_hp_en; + struct snd_soc_component *component; +}; + +static const struct snd_soc_dapm_widget bdw_rt5650_widgets[] = { + SND_SOC_DAPM_HP("Headphone", NULL), + SND_SOC_DAPM_SPK("Speaker", NULL), + SND_SOC_DAPM_MIC("Headset Mic", NULL), + SND_SOC_DAPM_MIC("DMIC Pair1", NULL), + SND_SOC_DAPM_MIC("DMIC Pair2", NULL), +}; + +static const struct snd_soc_dapm_route bdw_rt5650_map[] = { + /* Speakers */ + {"Speaker", NULL, "SPOL"}, + {"Speaker", NULL, "SPOR"}, + + /* Headset jack connectors */ + {"Headphone", NULL, "HPOL"}, + {"Headphone", NULL, "HPOR"}, + {"IN1P", NULL, "Headset Mic"}, + {"IN1N", NULL, "Headset Mic"}, + + /* Digital MICs + * DMIC Pair1 are the two DMICs connected on the DMICN1 connector. + * DMIC Pair2 are the two DMICs connected on the DMICN2 connector. + * Facing the camera, DMIC Pair1 are on the left side, DMIC Pair2 + * are on the right side. + */ + {"DMIC L1", NULL, "DMIC Pair1"}, + {"DMIC R1", NULL, "DMIC Pair1"}, + {"DMIC L2", NULL, "DMIC Pair2"}, + {"DMIC R2", NULL, "DMIC Pair2"}, + + /* CODEC BE connections */ + {"SSP0 CODEC IN", NULL, "AIF1 Capture"}, + {"AIF1 Playback", NULL, "SSP0 CODEC OUT"}, +}; + +static const struct snd_kcontrol_new bdw_rt5650_controls[] = { + SOC_DAPM_PIN_SWITCH("Speaker"), + SOC_DAPM_PIN_SWITCH("Headphone"), + SOC_DAPM_PIN_SWITCH("Headset Mic"), + SOC_DAPM_PIN_SWITCH("DMIC Pair1"), + SOC_DAPM_PIN_SWITCH("DMIC Pair2"), +}; + + +static struct snd_soc_jack headphone_jack; +static struct snd_soc_jack mic_jack; + +static struct snd_soc_jack_pin headphone_jack_pin = { + .pin = "Headphone", + .mask = SND_JACK_HEADPHONE, +}; + +static struct snd_soc_jack_pin mic_jack_pin = { + .pin = "Headset Mic", + .mask = SND_JACK_MICROPHONE, +}; + +static int broadwell_ssp0_fixup(struct snd_soc_pcm_runtime *rtd, + struct snd_pcm_hw_params *params) +{ + struct snd_interval *rate = hw_param_interval(params, + SNDRV_PCM_HW_PARAM_RATE); + struct snd_interval *channels = hw_param_interval(params, + SNDRV_PCM_HW_PARAM_CHANNELS); + + /* The ADSP will covert the FE rate to 48k, max 4-channels */ + rate->min = rate->max = 48000; + channels->min = 2; + channels->max = 4; + + /* set SSP0 to 24 bit */ + snd_mask_set_format(hw_param_mask(params, SNDRV_PCM_HW_PARAM_FORMAT), + SNDRV_PCM_FORMAT_S24_LE); + + return 0; +} + +static int bdw_rt5650_hw_params(struct snd_pcm_substream *substream, + struct snd_pcm_hw_params *params) +{ + struct snd_soc_pcm_runtime *rtd = substream->private_data; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + int ret; + + /* Workaround: set codec PLL to 19.2MHz that PLL source is + * from MCLK(24MHz) to conform 2.4MHz DMIC clock. + */ + ret = snd_soc_dai_set_pll(codec_dai, 0, RT5645_PLL1_S_MCLK, + 24000000, 19200000); + if (ret < 0) { + dev_err(rtd->dev, "can't set codec pll: %d\n", ret); + return ret; + } + + /* The actual MCLK freq is 24MHz. The codec is told that MCLK is + * 24.576MHz to satisfy the requirement of rl6231_get_clk_info. + * ASRC is enabled on AD and DA filters to ensure good audio quality. + */ + ret = snd_soc_dai_set_sysclk(codec_dai, RT5645_SCLK_S_PLL1, 24576000, + SND_SOC_CLOCK_IN); + if (ret < 0) { + dev_err(rtd->dev, "can't set codec sysclk configuration\n"); + return ret; + } + + return ret; +} + +static struct snd_soc_ops bdw_rt5650_ops = { + .hw_params = bdw_rt5650_hw_params, +}; + +#if !IS_ENABLED(CONFIG_SND_SOC_SOF_BROADWELL) +static int bdw_rt5650_rtd_init(struct snd_soc_pcm_runtime *rtd) +{ + struct snd_soc_component *component = + snd_soc_rtdcom_lookup(rtd, DRV_NAME); + struct sst_pdata *pdata = dev_get_platdata(component->dev); + struct sst_hsw *broadwell = pdata->dsp; + int ret; + + /* Set ADSP SSP port settings + * clock_divider = 4 means BCLK = MCLK/5 = 24MHz/5 = 4.8MHz + */ + ret = sst_hsw_device_set_config(broadwell, SST_HSW_DEVICE_SSP_0, + SST_HSW_DEVICE_MCLK_FREQ_24_MHZ, + SST_HSW_DEVICE_TDM_CLOCK_MASTER, 4); + if (ret < 0) { + dev_err(rtd->dev, "error: failed to set device config\n"); + return ret; + } + + return 0; +} +#endif + +static int bdw_rt5650_init(struct snd_soc_pcm_runtime *rtd) +{ + struct bdw_rt5650_priv *bdw_rt5650 = + snd_soc_card_get_drvdata(rtd->card); + struct snd_soc_component *component = rtd->codec_dai->component; + struct snd_soc_dai *codec_dai = rtd->codec_dai; + int ret; + + /* Enable codec ASRC function for Stereo DAC/Stereo1 ADC/DMIC/I2S1. + * The ASRC clock source is clk_i2s1_asrc. + */ + rt5645_sel_asrc_clk_src(component, + RT5645_DA_STEREO_FILTER | + RT5645_DA_MONO_L_FILTER | + RT5645_DA_MONO_R_FILTER | + RT5645_AD_STEREO_FILTER | + RT5645_AD_MONO_L_FILTER | + RT5645_AD_MONO_R_FILTER, + RT5645_CLK_SEL_I2S1_ASRC); + + /* TDM 4 slots 24 bit, set Rx & Tx bitmask to 4 active slots */ + ret = snd_soc_dai_set_tdm_slot(codec_dai, 0xF, 0xF, 4, 24); + + if (ret < 0) { + dev_err(rtd->dev, "can't set codec TDM slot %d\n", ret); + return ret; + } + + /* Create and initialize headphone jack */ + if (snd_soc_card_jack_new(rtd->card, "Headphone Jack", + SND_JACK_HEADPHONE, &headphone_jack, + &headphone_jack_pin, 1)) { + dev_err(component->dev, "Can't create headphone jack\n"); + } + + /* Create and initialize mic jack */ + if (snd_soc_card_jack_new(rtd->card, "Mic Jack", SND_JACK_MICROPHONE, + &mic_jack, &mic_jack_pin, 1)) { + dev_err(component->dev, "Can't create mic jack\n"); + } + + rt5645_set_jack_detect(component, &headphone_jack, &mic_jack, NULL); + + bdw_rt5650->component = component; + + return 0; +} + +/* broadwell digital audio interface glue - connects codec <--> CPU */ +SND_SOC_DAILINK_DEF(dummy, + DAILINK_COMP_ARRAY(COMP_DUMMY())); + +SND_SOC_DAILINK_DEF(fe, + DAILINK_COMP_ARRAY(COMP_CPU("System Pin"))); + +SND_SOC_DAILINK_DEF(platform, + DAILINK_COMP_ARRAY(COMP_PLATFORM("haswell-pcm-audio"))); + +SND_SOC_DAILINK_DEF(be, + DAILINK_COMP_ARRAY(COMP_CODEC("i2c-10EC5650:00", "rt5645-aif1"))); + +static struct snd_soc_dai_link bdw_rt5650_dais[] = { + /* Front End DAI links */ + { + .name = "System PCM", + .stream_name = "System Playback", + .dynamic = 1, +#if !IS_ENABLED(CONFIG_SND_SOC_SOF_BROADWELL) + .init = bdw_rt5650_rtd_init, +#endif + .trigger = { + SND_SOC_DPCM_TRIGGER_POST, + SND_SOC_DPCM_TRIGGER_POST + }, + .dpcm_playback = 1, + .dpcm_capture = 1, + SND_SOC_DAILINK_REG(fe, dummy, platform), + }, + + /* Back End DAI links */ + { + /* SSP0 - Codec */ + .name = "Codec", + .id = 0, + .no_pcm = 1, + .dai_fmt = SND_SOC_DAIFMT_DSP_B | SND_SOC_DAIFMT_NB_NF | + SND_SOC_DAIFMT_CBS_CFS, + .ignore_suspend = 1, + .ignore_pmdown_time = 1, + .be_hw_params_fixup = broadwell_ssp0_fixup, + .ops = &bdw_rt5650_ops, + .dpcm_playback = 1, + .dpcm_capture = 1, + .init = bdw_rt5650_init, + SND_SOC_DAILINK_REG(dummy, be, dummy), + }, +}; + +/* ASoC machine driver for Broadwell DSP + RT5650 */ +static struct snd_soc_card bdw_rt5650_card = { + .name = "bdw-rt5650", + .owner = THIS_MODULE, + .dai_link = bdw_rt5650_dais, + .num_links = ARRAY_SIZE(bdw_rt5650_dais), + .dapm_widgets = bdw_rt5650_widgets, + .num_dapm_widgets = ARRAY_SIZE(bdw_rt5650_widgets), + .dapm_routes = bdw_rt5650_map, + .num_dapm_routes = ARRAY_SIZE(bdw_rt5650_map), + .controls = bdw_rt5650_controls, + .num_controls = ARRAY_SIZE(bdw_rt5650_controls), + .fully_routed = true, +}; + +static int bdw_rt5650_probe(struct platform_device *pdev) +{ + struct bdw_rt5650_priv *bdw_rt5650; + struct snd_soc_acpi_mach *mach; + int ret; + + bdw_rt5650_card.dev = &pdev->dev; + + /* Allocate driver private struct */ + bdw_rt5650 = devm_kzalloc(&pdev->dev, sizeof(struct bdw_rt5650_priv), + GFP_KERNEL); + if (!bdw_rt5650) + return -ENOMEM; + + /* override plaform name, if required */ + mach = (&pdev->dev)->platform_data; + ret = snd_soc_fixup_dai_links_platform_name(&bdw_rt5650_card, + mach->mach_params.platform); + + if (ret) + return ret; + + snd_soc_card_set_drvdata(&bdw_rt5650_card, bdw_rt5650); + + return devm_snd_soc_register_card(&pdev->dev, &bdw_rt5650_card); +} + +static struct platform_driver bdw_rt5650_audio = { + .probe = bdw_rt5650_probe, + .driver = { + .name = "bdw-rt5650", + .pm = &snd_soc_pm_ops, + }, +}; + +module_platform_driver(bdw_rt5650_audio) + +/* Module information */ +MODULE_AUTHOR("Ben Zhang <benzh@chromium.org>"); +MODULE_DESCRIPTION("Intel Broadwell RT5650 machine driver"); +MODULE_LICENSE("GPL v2"); +MODULE_ALIAS("platform:bdw-rt5650"); |