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author | Nicolin Chen <Guangyu.Chen@freescale.com> | 2014-04-30 18:54:09 +0800 |
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committer | Mark Brown <broonie@linaro.org> | 2014-05-05 12:27:40 -0700 |
commit | b8a832a0b667d48642c495af17b19443208dd09e (patch) | |
tree | 9663c12dbd62bdbc5b5594603147c45acf2c6431 /sound/soc/fsl/fsl_spdif.c | |
parent | 527cda78eb601b0ad303dc4999811731eff5560e (diff) | |
download | linux-b8a832a0b667d48642c495af17b19443208dd09e.tar.bz2 |
ASoc: fsl_spdif: Add descriptions for fsl_spdif_priv
Other people would clearly understand each member and improve if they want.
Signed-off-by: Nicolin Chen <Guangyu.Chen@freescale.com>
Signed-off-by: Mark Brown <broonie@linaro.org>
Diffstat (limited to 'sound/soc/fsl/fsl_spdif.c')
-rw-r--r-- | sound/soc/fsl/fsl_spdif.c | 21 |
1 files changed, 21 insertions, 0 deletions
diff --git a/sound/soc/fsl/fsl_spdif.c b/sound/soc/fsl/fsl_spdif.c index 53e24ab952d3..f597f3768723 100644 --- a/sound/soc/fsl/fsl_spdif.c +++ b/sound/soc/fsl/fsl_spdif.c @@ -69,6 +69,27 @@ struct spdif_mixer_control { u32 ready_buf; }; +/** + * fsl_spdif_priv: Freescale SPDIF private data + * + * @fsl_spdif_control: SPDIF control data + * @cpu_dai_drv: cpu dai driver + * @pdev: platform device pointer + * @regmap: regmap handler + * @dpll_locked: dpll lock flag + * @txrate: the best rates for playback + * @txclk_df: STC_TXCLK_DF dividers value for playback + * @sysclk_df: STC_SYSCLK_DF dividers value for playback + * @txclk_src: STC_TXCLK_SRC values for playback + * @rxclk_src: SRPC_CLKSRC_SEL values for capture + * @txclk: tx clock sources for playback + * @rxclk: rx clock sources for capture + * @coreclk: core clock for register access via DMA + * @sysclk: system clock for rx clock rate measurement + * @dma_params_tx: DMA parameters for transmit channel + * @dma_params_rx: DMA parameters for receive channel + * @name: driver name + */ struct fsl_spdif_priv { struct spdif_mixer_control fsl_spdif_control; struct snd_soc_dai_driver cpu_dai_drv; |