diff options
| author | Shengjiu Wang <shengjiu.wang@nxp.com> | 2020-09-01 19:01:08 +0800 |
|---|---|---|
| committer | Mark Brown <broonie@kernel.org> | 2020-09-03 14:47:36 +0100 |
| commit | 770f58d7d2c58b8ff31d3694ce14a785c2e75009 (patch) | |
| tree | 453f8c1bf89a100c4613650b06828bb8164d8a03 /sound/soc/fsl/fsl_sai.h | |
| parent | a57307ca6b661e16f9435a25f376ac277c3de697 (diff) | |
| download | linux-770f58d7d2c58b8ff31d3694ce14a785c2e75009.tar.bz2 | |
ASoC: fsl_sai: Support multiple data channel enable bits
One data channel is one data line. From imx7ulp, the SAI IP is
enhanced to support multiple data channels.
If there is only two channels input and slots is 2, then enable one
data channel is enough for data transfer. So enable the TCE/RCE and
transmit/receive mask register according to the input channels and
slots configuration.
Move the data channel enablement from startup() to hw_params().
Signed-off-by: Shengjiu Wang <shengjiu.wang@nxp.com>
Acked-by: Nicolin Chen <nicoleotsuka@gmail.com>
Link: https://lore.kernel.org/r/1598958068-10552-1-git-send-email-shengjiu.wang@nxp.com
Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/fsl/fsl_sai.h')
| -rw-r--r-- | sound/soc/fsl/fsl_sai.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/sound/soc/fsl/fsl_sai.h b/sound/soc/fsl/fsl_sai.h index 6aba7d28f5f3..5f630be74853 100644 --- a/sound/soc/fsl/fsl_sai.h +++ b/sound/soc/fsl/fsl_sai.h @@ -109,7 +109,7 @@ #define FSL_SAI_CR2_DIV_MASK 0xff /* SAI Transmit and Receive Configuration 3 Register */ -#define FSL_SAI_CR3_TRCE BIT(16) +#define FSL_SAI_CR3_TRCE(x) ((x) << 16) #define FSL_SAI_CR3_TRCE_MASK GENMASK(23, 16) #define FSL_SAI_CR3_WDFL(x) (x) #define FSL_SAI_CR3_WDFL_MASK 0x1f |