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authorAdam Thomson <Adam.Thomson.Opensource@diasemi.com>2016-05-10 16:11:08 +0100
committerMark Brown <broonie@kernel.org>2016-05-10 19:24:19 +0100
commitabc189eadf6c12e60f95030e9c84083175526eaf (patch)
treeb20db0e344e6dbcfc06aae58e6ab6fe7014be458 /sound/soc/blackfin/bf5xx-ad1836.c
parent1e62c52ddc2d23a02ac2308cc1bb6ff18f0cf3cd (diff)
downloadlinux-abc189eadf6c12e60f95030e9c84083175526eaf.tar.bz2
ASoC: da7213: Allow PLL disable/bypass when using 32KHz sysclk
Current checking for PLL 32KHz mode fails in driver code when bypassing the PLL. This is due to an incorrect check of PLL source type when 32KHz clock is provided. Removal of this check resolves the issue. Signed-off-by: Adam Thomson <Adam.Thomson.Opensource@diasemi.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'sound/soc/blackfin/bf5xx-ad1836.c')
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