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author | Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com> | 2016-06-17 11:32:00 +0530 |
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committer | Michael Ellerman <mpe@ellerman.id.au> | 2016-06-17 19:47:51 +1000 |
commit | e568006b9d828403397668864d9797dc4bfefd28 (patch) | |
tree | 5d33a311e57ea12fecda5c04edca711b653cc845 /sound/isa | |
parent | 8550e2fa34f077c8a87cf1ba2453102bbbc9ade9 (diff) | |
download | linux-e568006b9d828403397668864d9797dc4bfefd28.tar.bz2 |
powerpc/mm/hash: Don't add memory coherence if cache inhibited is set
H_ENTER hcall handling in qemu had assumptions that a cache inhibited
hpte entry won't have memory conference set. Also older kernel
mentioned that some version of pHyp required this (the code removed
by the below commit says:
/* Make pHyp happy */
if ((rflags & _PAGE_NO_CACHE) && !(rflags & _PAGE_WRITETHRU))
hpte_r &= ~HPTE_R_M;
But with older kernel we had some inconsistent memory conherence
mapping. We always enabled memory conherence in the page fault path and
removed memory conherence is _PAGE_NO_CACHE was set when we mapped the
page via htab_bolt_mapping. The commit mentioned below tried to
consolidate that by always enabling memory conherence. But as mentioned
above that breaks Qemu H_ENTER handling.
This patch update this such that we enable memory conherence only if
cache inhibited is not set and bring fault handling, lpar and bolt
mapping in sync.
Fixes: commit 30bda41aba4e("powerpc/mm: Drop WIMG in favour of new constant")
Reported-by: Darrick J. Wong <darrick.wong@oracle.com>
Signed-off-by: Aneesh Kumar K.V <aneesh.kumar@linux.vnet.ibm.com>
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>
Diffstat (limited to 'sound/isa')
0 files changed, 0 insertions, 0 deletions