ALSA: dice: reorganize interface definitions

Move the DICE interface symbols into a separate header file, and add
more documentation.

Signed-off-by: Clemens Ladisch <clemens@ladisch.de>

1 files changed, 2 insertions, 207 deletions

diff --git a/sound/firewire/dice.c b/sound/firewire/dice.c
index 3591aebd1bb7..1da1ddefd6a8 100644
--- a/sound/firewire/dice.c
+++ b/sound/firewire/dice.c
@@ -26,212 +26,7 @@
 #include "amdtp.h"
 #include "iso-resources.h"
 #include "lib.h"
-
-#define DICE_PRIVATE_SPACE		0xffffe0000000uLL
-
-/* offset from DICE_PRIVATE_SPACE; offsets and sizes in quadlets */
-#define DICE_GLOBAL_OFFSET		0x00
-#define DICE_GLOBAL_SIZE		0x04
-#define DICE_TX_OFFSET			0x08
-#define DICE_TX_SIZE			0x0c
-#define DICE_RX_OFFSET			0x10
-#define DICE_RX_SIZE			0x14
-
-/* pointed to by DICE_GLOBAL_OFFSET */
-#define GLOBAL_OWNER			0x000
-#define  OWNER_NO_OWNER			0xffff000000000000uLL
-#define  OWNER_NODE_SHIFT		48
-#define GLOBAL_NOTIFICATION		0x008
-#define  NOTIFY_RX_CFG_CHG		0x00000001
-#define  NOTIFY_TX_CFG_CHG		0x00000002
-#define  NOTIFY_DUP_ISOC		0x00000004
-#define  NOTIFY_BW_ERR			0x00000008
-#define  NOTIFY_LOCK_CHG		0x00000010
-#define  NOTIFY_CLOCK_ACCEPTED		0x00000020
-#define  NOTIFY_INTERFACE_CHG		0x00000040
-#define  NOTIFY_MESSAGE			0x00100000
-#define GLOBAL_NICK_NAME		0x00c
-#define  NICK_NAME_SIZE			64
-#define GLOBAL_CLOCK_SELECT		0x04c
-#define  CLOCK_SOURCE_MASK		0x000000ff
-#define  CLOCK_SOURCE_AES1		0x00000000
-#define  CLOCK_SOURCE_AES2		0x00000001
-#define  CLOCK_SOURCE_AES3		0x00000002
-#define  CLOCK_SOURCE_AES4		0x00000003
-#define  CLOCK_SOURCE_AES_ANY		0x00000004
-#define  CLOCK_SOURCE_ADAT		0x00000005
-#define  CLOCK_SOURCE_TDIF		0x00000006
-#define  CLOCK_SOURCE_WC		0x00000007
-#define  CLOCK_SOURCE_ARX1		0x00000008
-#define  CLOCK_SOURCE_ARX2		0x00000009
-#define  CLOCK_SOURCE_ARX3		0x0000000a
-#define  CLOCK_SOURCE_ARX4		0x0000000b
-#define  CLOCK_SOURCE_INTERNAL		0x0000000c
-#define  CLOCK_RATE_MASK		0x0000ff00
-#define  CLOCK_RATE_32000		0x00000000
-#define  CLOCK_RATE_44100		0x00000100
-#define  CLOCK_RATE_48000		0x00000200
-#define  CLOCK_RATE_88200		0x00000300
-#define  CLOCK_RATE_96000		0x00000400
-#define  CLOCK_RATE_176400		0x00000500
-#define  CLOCK_RATE_192000		0x00000600
-#define  CLOCK_RATE_ANY_LOW		0x00000700
-#define  CLOCK_RATE_ANY_MID		0x00000800
-#define  CLOCK_RATE_ANY_HIGH		0x00000900
-#define  CLOCK_RATE_NONE		0x00000a00
-#define  CLOCK_RATE_SHIFT		8
-#define GLOBAL_ENABLE			0x050
-#define  ENABLE				0x00000001
-#define GLOBAL_STATUS			0x054
-#define  STATUS_SOURCE_LOCKED		0x00000001
-#define  STATUS_RATE_CONFLICT		0x00000002
-#define  STATUS_NOMINAL_RATE_MASK	0x0000ff00
-#define GLOBAL_EXTENDED_STATUS		0x058
-#define  EXT_STATUS_AES1_LOCKED		0x00000001
-#define  EXT_STATUS_AES2_LOCKED		0x00000002
-#define  EXT_STATUS_AES3_LOCKED		0x00000004
-#define  EXT_STATUS_AES4_LOCKED		0x00000008
-#define  EXT_STATUS_ADAT_LOCKED		0x00000010
-#define  EXT_STATUS_TDIF_LOCKED		0x00000020
-#define  EXT_STATUS_ARX1_LOCKED		0x00000040
-#define  EXT_STATUS_ARX2_LOCKED		0x00000080
-#define  EXT_STATUS_ARX3_LOCKED		0x00000100
-#define  EXT_STATUS_ARX4_LOCKED		0x00000200
-#define  EXT_STATUS_WC_LOCKED		0x00000400
-#define  EXT_STATUS_AES1_SLIP		0x00010000
-#define  EXT_STATUS_AES2_SLIP		0x00020000
-#define  EXT_STATUS_AES3_SLIP		0x00040000
-#define  EXT_STATUS_AES4_SLIP		0x00080000
-#define  EXT_STATUS_ADAT_SLIP		0x00100000
-#define  EXT_STATUS_TDIF_SLIP		0x00200000
-#define  EXT_STATUS_ARX1_SLIP		0x00400000
-#define  EXT_STATUS_ARX2_SLIP		0x00800000
-#define  EXT_STATUS_ARX3_SLIP		0x01000000
-#define  EXT_STATUS_ARX4_SLIP		0x02000000
-#define  EXT_STATUS_WC_SLIP		0x04000000
-#define GLOBAL_SAMPLE_RATE		0x05c
-#define GLOBAL_VERSION			0x060
-#define GLOBAL_CLOCK_CAPABILITIES	0x064
-#define  CLOCK_CAP_RATE_32000		0x00000001
-#define  CLOCK_CAP_RATE_44100		0x00000002
-#define  CLOCK_CAP_RATE_48000		0x00000004
-#define  CLOCK_CAP_RATE_88200		0x00000008
-#define  CLOCK_CAP_RATE_96000		0x00000010
-#define  CLOCK_CAP_RATE_176400		0x00000020
-#define  CLOCK_CAP_RATE_192000		0x00000040
-#define  CLOCK_CAP_SOURCE_AES1		0x00010000
-#define  CLOCK_CAP_SOURCE_AES2		0x00020000
-#define  CLOCK_CAP_SOURCE_AES3		0x00040000
-#define  CLOCK_CAP_SOURCE_AES4		0x00080000
-#define  CLOCK_CAP_SOURCE_AES_ANY	0x00100000
-#define  CLOCK_CAP_SOURCE_ADAT		0x00200000
-#define  CLOCK_CAP_SOURCE_TDIF		0x00400000
-#define  CLOCK_CAP_SOURCE_WC		0x00800000
-#define  CLOCK_CAP_SOURCE_ARX1		0x01000000
-#define  CLOCK_CAP_SOURCE_ARX2		0x02000000
-#define  CLOCK_CAP_SOURCE_ARX3		0x04000000
-#define  CLOCK_CAP_SOURCE_ARX4		0x08000000
-#define  CLOCK_CAP_SOURCE_INTERNAL	0x10000000
-#define GLOBAL_CLOCK_SOURCE_NAMES	0x068
-#define  CLOCK_SOURCE_NAMES_SIZE	256
-
-/* pointed to by DICE_TX_OFFSET */
-#define TX_NUMBER			0x000
-#define TX_SIZE				0x004
-/* repeated TX_NUMBER times, offset by TX_SIZE quadlets */
-#define TX_ISOCHRONOUS			0x008
-#define TX_NUMBER_AUDIO			0x00c
-#define TX_NUMBER_MIDI			0x010
-#define TX_SPEED			0x014
-#define TX_NAMES			0x018
-#define  TX_NAMES_SIZE			256
-#define TX_AC3_CAPABILITIES		0x118
-#define TX_AC3_ENABLE			0x11c
-
-/* pointed to by DICE_RX_OFFSET */
-#define RX_NUMBER			0x000
-#define RX_SIZE				0x004
-/* repeated RX_NUMBER times, offset by RX_SIZE quadlets */
-#define RX_ISOCHRONOUS			0x008
-#define RX_SEQ_START			0x00c
-#define RX_NUMBER_AUDIO			0x010
-#define RX_NUMBER_MIDI			0x014
-#define RX_NAMES			0x018
-#define  RX_NAMES_SIZE			256
-#define RX_AC3_CAPABILITIES		0x118
-#define RX_AC3_ENABLE			0x11c
-
-
-#define FIRMWARE_LOAD_SPACE		0xffffe0100000uLL
-
-/* offset from FIRMWARE_LOAD_SPACE */
-#define FIRMWARE_VERSION		0x000
-#define FIRMWARE_OPCODE			0x004
-#define  OPCODE_MASK			0x00000fff
-#define  OPCODE_GET_IMAGE_DESC		0x00000000
-#define  OPCODE_DELETE_IMAGE		0x00000001
-#define  OPCODE_CREATE_IMAGE		0x00000002
-#define  OPCODE_UPLOAD			0x00000003
-#define  OPCODE_UPLOAD_STAT		0x00000004
-#define  OPCODE_RESET_IMAGE		0x00000005
-#define  OPCODE_TEST_ACTION		0x00000006
-#define  OPCODE_GET_RUNNING_IMAGE_VINFO	0x0000000a
-#define  OPCODE_EXECUTE			0x80000000
-#define FIRMWARE_RETURN_STATUS		0x008
-#define FIRMWARE_PROGRESS		0x00c
-#define  PROGRESS_CURR_MASK		0x00000fff
-#define  PROGRESS_MAX_MASK		0x00fff000
-#define  PROGRESS_TOUT_MASK		0x0f000000
-#define  PROGRESS_FLAG			0x80000000
-#define FIRMWARE_CAPABILITIES		0x010
-#define  FL_CAP_AUTOERASE		0x00000001
-#define  FL_CAP_PROGRESS		0x00000002
-#define FIRMWARE_DATA			0x02c
-#define  TEST_CMD_POKE			0x00000001
-#define  TEST_CMD_PEEK			0x00000002
-#define  CMD_GET_AVS_CNT		0x00000003
-#define  CMD_CLR_AVS_CNT		0x00000004
-#define  CMD_SET_MODE			0x00000005
-#define  CMD_SET_MIDIBP			0x00000006
-#define  CMD_GET_AVSPHASE		0x00000007
-#define  CMD_ENABLE_BNC_SYNC		0x00000008
-#define  CMD_PULSE_BNC_SYNC		0x00000009
-#define  CMD_EMUL_SLOW_CMD		0x0000000a
-#define FIRMWARE_TEST_DELAY		0xfd8
-#define FIRMWARE_TEST_BUF		0xfdc
-
-
-/* EAP */
-#define EAP_PRIVATE_SPACE		0xffffe0200000uLL
-
-#define EAP_CAPABILITY_OFFSET		0x000
-#define EAP_CAPABILITY_SIZE		0x004
-/* ... */
-
-#define EAP_ROUTER_CAPS			0x000
-#define  ROUTER_EXPOSED			0x00000001
-#define  ROUTER_READ_ONLY		0x00000002
-#define  ROUTER_FLASH			0x00000004
-#define  MAX_ROUTES_MASK		0xffff0000
-#define EAP_MIXER_CAPS			0x004
-#define  MIXER_EXPOSED			0x00000001
-#define  MIXER_READ_ONLY		0x00000002
-#define  MIXER_FLASH			0x00000004
-#define  MIXER_IN_DEV_MASK		0x000000f0
-#define  MIXER_OUT_DEV_MASK		0x00000f00
-#define  MIXER_INPUTS_MASK		0x00ff0000
-#define  MIXER_OUTPUTS_MASK		0xff000000
-#define EAP_GENERAL_CAPS		0x008
-#define  GENERAL_STREAM_CONFIG		0x00000001
-#define  GENERAL_FLASH			0x00000002
-#define  GENERAL_PEAK			0x00000004
-#define  GENERAL_MAX_TX_STREAMS_MASK	0x000000f0
-#define  GENERAL_MAX_RX_STREAMS_MASK	0x00000f00
-#define  GENERAL_STREAM_CONFIG_FLASH	0x00001000
-#define  GENERAL_CHIP_MASK		0x00ff0000
-#define  GENERAL_CHIP_DICE_II		0x00000000
-#define  GENERAL_CHIP_DICE_MINI		0x00010000
-#define  GENERAL_CHIP_DICE_JR		0x00020000
+#include "dice-interface.h"
 
 
 struct dice {
@@ -479,7 +274,7 @@ static int dice_enable_set(struct dice *dice)
 	__be32 value;
 	int rcode, err, errors = 0;
 
-	value = cpu_to_be32(ENABLE);
+	value = cpu_to_be32(1);
 	for (;;) {
 		rcode = fw_run_transaction(device->card,
 					   TCODE_WRITE_QUADLET_REQUEST,