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authorLinus Torvalds <torvalds@linux-foundation.org>2018-04-02 20:20:12 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2018-04-02 20:20:12 -0700
commitf5a8eb632b562bd9c16c389f5db3a5260fba4157 (patch)
tree82687234d772ff8f72a31e598fe16553885c56c9 /scripts
parentc9297d284126b80c9cfd72c690e0da531c99fc48 (diff)
parentdd3b8c329aa270027fba61a02a12600972dc3983 (diff)
downloadlinux-f5a8eb632b562bd9c16c389f5db3a5260fba4157.tar.bz2
Merge tag 'arch-removal' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic
Pul removal of obsolete architecture ports from Arnd Bergmann: "This removes the entire architecture code for blackfin, cris, frv, m32r, metag, mn10300, score, and tile, including the associated device drivers. I have been working with the (former) maintainers for each one to ensure that my interpretation was right and the code is definitely unused in mainline kernels. Many had fond memories of working on the respective ports to start with and getting them included in upstream, but also saw no point in keeping the port alive without any users. In the end, it seems that while the eight architectures are extremely different, they all suffered the same fate: There was one company in charge of an SoC line, a CPU microarchitecture and a software ecosystem, which was more costly than licensing newer off-the-shelf CPU cores from a third party (typically ARM, MIPS, or RISC-V). It seems that all the SoC product lines are still around, but have not used the custom CPU architectures for several years at this point. In contrast, CPU instruction sets that remain popular and have actively maintained kernel ports tend to all be used across multiple licensees. [ See the new nds32 port merged in the previous commit for the next generation of "one company in charge of an SoC line, a CPU microarchitecture and a software ecosystem" - Linus ] The removal came out of a discussion that is now documented at https://lwn.net/Articles/748074/. Unlike the original plans, I'm not marking any ports as deprecated but remove them all at once after I made sure that they are all unused. Some architectures (notably tile, mn10300, and blackfin) are still being shipped in products with old kernels, but those products will never be updated to newer kernel releases. After this series, we still have a few architectures without mainline gcc support: - unicore32 and hexagon both have very outdated gcc releases, but the maintainers promised to work on providing something newer. At least in case of hexagon, this will only be llvm, not gcc. - openrisc, risc-v and nds32 are still in the process of finishing their support or getting it added to mainline gcc in the first place. They all have patched gcc-7.3 ports that work to some degree, but complete upstream support won't happen before gcc-8.1. Csky posted their first kernel patch set last week, their situation will be similar [ Palmer Dabbelt points out that RISC-V support is in mainline gcc since gcc-7, although gcc-7.3.0 is the recommended minimum - Linus ]" This really says it all: 2498 files changed, 95 insertions(+), 467668 deletions(-) * tag 'arch-removal' of git://git.kernel.org/pub/scm/linux/kernel/git/arnd/asm-generic: (74 commits) MAINTAINERS: UNICORE32: Change email account staging: iio: remove iio-trig-bfin-timer driver tty: hvc: remove tile driver tty: remove bfin_jtag_comm and hvc_bfin_jtag drivers serial: remove tile uart driver serial: remove m32r_sio driver serial: remove blackfin drivers serial: remove cris/etrax uart drivers usb: Remove Blackfin references in USB support usb: isp1362: remove blackfin arch glue usb: musb: remove blackfin port usb: host: remove tilegx platform glue pwm: remove pwm-bfin driver i2c: remove bfin-twi driver spi: remove blackfin related host drivers watchdog: remove bfin_wdt driver can: remove bfin_can driver mmc: remove bfin_sdh driver input: misc: remove blackfin rotary driver input: keyboard: remove bf54x driver ...
Diffstat (limited to 'scripts')
-rwxr-xr-xscripts/checkpatch.pl26
-rwxr-xr-xscripts/checkstack.pl7
-rw-r--r--scripts/mod/modpost.c7
-rw-r--r--scripts/recordmcount.c20
-rwxr-xr-xscripts/recordmcount.pl8
5 files changed, 3 insertions, 65 deletions
diff --git a/scripts/checkpatch.pl b/scripts/checkpatch.pl
index 3d4040322ae1..949842e8c97e 100755
--- a/scripts/checkpatch.pl
+++ b/scripts/checkpatch.pl
@@ -2969,20 +2969,6 @@ sub process {
"adding a line without newline at end of file\n" . $herecurr);
}
-# Blackfin: use hi/lo macros
- if ($realfile =~ m@arch/blackfin/.*\.S$@) {
- if ($line =~ /\.[lL][[:space:]]*=.*&[[:space:]]*0x[fF][fF][fF][fF]/) {
- my $herevet = "$here\n" . cat_vet($line) . "\n";
- ERROR("LO_MACRO",
- "use the LO() macro, not (... & 0xFFFF)\n" . $herevet);
- }
- if ($line =~ /\.[hH][[:space:]]*=.*>>[[:space:]]*16/) {
- my $herevet = "$here\n" . cat_vet($line) . "\n";
- ERROR("HI_MACRO",
- "use the HI() macro, not (... >> 16)\n" . $herevet);
- }
- }
-
# check we are in a valid source file C or perl if not then ignore this hunk
next if ($realfile !~ /\.(h|c|pl|dtsi|dts)$/);
@@ -3269,18 +3255,6 @@ sub process {
"CVS style keyword markers, these will _not_ be updated\n". $herecurr);
}
-# Blackfin: don't use __builtin_bfin_[cs]sync
- if ($line =~ /__builtin_bfin_csync/) {
- my $herevet = "$here\n" . cat_vet($line) . "\n";
- ERROR("CSYNC",
- "use the CSYNC() macro in asm/blackfin.h\n" . $herevet);
- }
- if ($line =~ /__builtin_bfin_ssync/) {
- my $herevet = "$here\n" . cat_vet($line) . "\n";
- ERROR("SSYNC",
- "use the SSYNC() macro in asm/blackfin.h\n" . $herevet);
- }
-
# check for old HOTPLUG __dev<foo> section markings
if ($line =~ /\b(__dev(init|exit)(data|const|))\b/) {
WARN("HOTPLUG_SECTION",
diff --git a/scripts/checkstack.pl b/scripts/checkstack.pl
index cb993801e4b2..cbdf0dfd4c22 100755
--- a/scripts/checkstack.pl
+++ b/scripts/checkstack.pl
@@ -64,10 +64,6 @@ my (@stack, $re, $dre, $x, $xs, $funcre);
# 2b6c: 4e56 fb70 linkw %fp,#-1168
# 1df770: defc ffe4 addaw #-28,%sp
$re = qr/.*(?:linkw %fp,|addaw )#-([0-9]{1,4})(?:,%sp)?$/o;
- } elsif ($arch eq 'metag') {
- #400026fc: 40 00 00 82 ADD A0StP,A0StP,#0x8
- $re = qr/.*ADD.*A0StP,A0StP,\#(0x$x{1,8})/o;
- $funcre = qr/^$x* <[^\$](.*)>:$/;
} elsif ($arch eq 'mips64') {
#8800402c: 67bdfff0 daddiu sp,sp,-16
$re = qr/.*daddiu.*sp,sp,-(([0-9]{2}|[3-9])[0-9]{2})/o;
@@ -102,9 +98,6 @@ my (@stack, $re, $dre, $x, $xs, $funcre);
# pair for larger users. -- PFM.
#a00048e0: d4fc40f0 addi.l r15,-240,r15
$re = qr/.*addi\.l.*r15,-(([0-9]{2}|[3-9])[0-9]{2}),r15/o;
- } elsif ($arch =~ /^blackfin$/) {
- # 0: 00 e8 38 01 LINK 0x4e0;
- $re = qr/.*[[:space:]]LINK[[:space:]]*(0x$x{1,8})/o;
} elsif ($arch eq 'sparc' || $arch eq 'sparc64') {
# f0019d10: 9d e3 bf 90 save %sp, -112, %sp
$re = qr/.*save.*%sp, -(([0-9]{2}|[3-9])[0-9]{2}), %sp/o;
diff --git a/scripts/mod/modpost.c b/scripts/mod/modpost.c
index 9917f928d0fd..4ff08a0ef5d3 100644
--- a/scripts/mod/modpost.c
+++ b/scripts/mod/modpost.c
@@ -840,8 +840,7 @@ static const char *const section_white_list[] =
".debug*",
".cranges", /* sh64 */
".zdebug*", /* Compressed debug sections. */
- ".GCC-command-line", /* mn10300 */
- ".GCC.command.line", /* record-gcc-switches, non mn10300 */
+ ".GCC.command.line", /* record-gcc-switches */
".mdebug*", /* alpha, score, mips etc. */
".pdr", /* alpha, score, mips etc. */
".stab*",
@@ -1104,8 +1103,8 @@ static const struct sectioncheck *section_mismatch(
/*
* The target section could be the SHT_NUL section when we're
* handling relocations to un-resolved symbols, trying to match it
- * doesn't make much sense and causes build failures on parisc and
- * mn10300 architectures.
+ * doesn't make much sense and causes build failures on parisc
+ * architectures.
*/
if (*tosec == '\0')
return NULL;
diff --git a/scripts/recordmcount.c b/scripts/recordmcount.c
index 16e086dcc567..8c9691c3329e 100644
--- a/scripts/recordmcount.c
+++ b/scripts/recordmcount.c
@@ -33,20 +33,6 @@
#include <string.h>
#include <unistd.h>
-/*
- * glibc synced up and added the metag number but didn't add the relocations.
- * Work around this in a crude manner for now.
- */
-#ifndef EM_METAG
-#define EM_METAG 174
-#endif
-#ifndef R_METAG_ADDR32
-#define R_METAG_ADDR32 2
-#endif
-#ifndef R_METAG_NONE
-#define R_METAG_NONE 3
-#endif
-
#ifndef EM_AARCH64
#define EM_AARCH64 183
#define R_AARCH64_NONE 0
@@ -538,12 +524,6 @@ do_file(char const *const fname)
gpfx = '_';
break;
case EM_IA_64: reltype = R_IA64_IMM64; gpfx = '_'; break;
- case EM_METAG: reltype = R_METAG_ADDR32;
- altmcount = "_mcount_wrapper";
- rel_type_nop = R_METAG_NONE;
- /* We happen to have the same requirement as MIPS */
- is_fake_mcount32 = MIPS32_is_fake_mcount;
- break;
case EM_MIPS: /* reltype: e_class */ gpfx = '_'; break;
case EM_PPC: reltype = R_PPC_ADDR32; gpfx = '_'; break;
case EM_PPC64: reltype = R_PPC64_ADDR64; gpfx = '_'; break;
diff --git a/scripts/recordmcount.pl b/scripts/recordmcount.pl
index 2033af758173..c74ecc6504e8 100755
--- a/scripts/recordmcount.pl
+++ b/scripts/recordmcount.pl
@@ -368,14 +368,6 @@ if ($arch eq "x86_64") {
} elsif ($arch eq "microblaze") {
# Microblaze calls '_mcount' instead of plain 'mcount'.
$mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\s_mcount\$";
-} elsif ($arch eq "blackfin") {
- $mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\s__mcount\$";
- $mcount_adjust = -4;
-} elsif ($arch eq "tilegx" || $arch eq "tile") {
- # Default to the newer TILE-Gx architecture if only "tile" is given.
- $mcount_regex = "^\\s*([0-9a-fA-F]+):.*\\s__mcount\$";
- $type = ".quad";
- $alignment = 8;
} else {
die "Arch $arch is not supported with CONFIG_FTRACE_MCOUNT_RECORD";
}