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| author | James Liao <jamesjj.liao@mediatek.com> | 2015-07-10 16:39:32 +0800 |
|---|---|---|
| committer | Stephen Boyd <sboyd@codeaurora.org> | 2015-07-28 11:58:52 -0700 |
| commit | b3be457e5854e3095cd0be850058c765aaf467ab (patch) | |
| tree | 427efcbd2d64d3d21b2642289c89f4e6b3142bc3 /scripts/ksymoops | |
| parent | 9783c0d98501aa146ff467916ab4b8830a655d7c (diff) | |
| download | linux-b3be457e5854e3095cd0be850058c765aaf467ab.tar.bz2 | |
clk: mediatek: Fix PLL registers setting flow
Write postdiv and pcw settings at the same time for PLLs if postdiv
and pcw settings are on the same register.
This is need by PLLs such as MT8173 MMPLL and ARM*PLL.
Signed-off-by: James Liao <jamesjj.liao@mediatek.com>
Acked-by: Sascha Hauer <s.hauer@pengutronix.de>
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
Diffstat (limited to 'scripts/ksymoops')
0 files changed, 0 insertions, 0 deletions