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authorKrishna Yarlagadda <kyarlagadda@nvidia.com>2019-09-04 10:13:06 +0530
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>2019-09-05 10:00:05 +0200
commitd781ec21bae6ff8f9e07682e8947a654484611f5 (patch)
treec7403f1b109700354d0d6205a712ad5393bf76ee /samples
parentf04a3cc8d4550463e0c15be59d91177a5def1ca5 (diff)
downloadlinux-d781ec21bae6ff8f9e07682e8947a654484611f5.tar.bz2
serial: tegra: report clk rate errors
Standard UART controllers support +/-4% baud rate error tolerance. Tegra186 only supports 0% to +4% error tolerance whereas other Tegra chips support standard +/-4% rate. Add chip data for knowing error tolerance level for each soc. Creating new compatible for Tegra194 chip as it supports baud rate error tolerance of -2 to +2%, different from older chips. Signed-off-by: Shardar Shariff Md <smohammed@nvidia.com> Signed-off-by: Krishna Yarlagadda <kyarlagadda@nvidia.com> Link: https://lore.kernel.org/r/1567572187-29820-12-git-send-email-kyarlagadda@nvidia.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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