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authorDavid S. Miller <davem@davemloft.net>2016-07-19 19:42:02 -0700
committerDavid S. Miller <davem@davemloft.net>2016-07-19 19:42:02 -0700
commit5e31c7019f08e85d5c285befe30620f7291b4ad3 (patch)
tree25edd602c203442ec3fe5f74cb290b692742149f /net
parent183fc1537ec39be242dc8b619f71fc11b393d295 (diff)
parent2cfcd9641618e71a1b823324aa4737e18662c25e (diff)
downloadlinux-5e31c7019f08e85d5c285befe30620f7291b4ad3.tar.bz2
Merge branch 'dsa-mv88e6xxx-g2-cleanup-stp'
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: Global2 cleanup and STP The Marvell switches registers are organized in distinct internal SMI devices, such as PHY, Port, Global 1 or Global 2 registers sets. Since not all chips support every registers sets or have slightly differences in them (such as old 88E6060 or new 88E6390 likely to be supported soon), make the setup code clearer now by removing a few family checks and adding flags to describe the Global 2 registers map. This patchset enables basic STP support and bridging on most chips when getting rid of a few inconsistencies in chip descriptions (patch 1) and add bridge Ageing Time support to DSA and the mv88e6xxx driver. Changes v2 -> v3: - rename mv88e6xxx_update_write to mv88e6xxx_update - set fastest ageing time in use in the chip for multiple bridges, tested with a few printk Changes v1 -> v2: - add a write helper for pointer-data Update registers - add ageing time support ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'net')
-rw-r--r--net/dsa/slave.c41
1 files changed, 41 insertions, 0 deletions
diff --git a/net/dsa/slave.c b/net/dsa/slave.c
index 7236eb26dc97..fc9196745225 100644
--- a/net/dsa/slave.c
+++ b/net/dsa/slave.c
@@ -333,6 +333,44 @@ static int dsa_slave_vlan_filtering(struct net_device *dev,
return 0;
}
+static int dsa_fastest_ageing_time(struct dsa_switch *ds,
+ unsigned int ageing_time)
+{
+ int i;
+
+ for (i = 0; i < DSA_MAX_PORTS; ++i) {
+ struct dsa_port *dp = &ds->ports[i];
+
+ if (dp && dp->ageing_time && dp->ageing_time < ageing_time)
+ ageing_time = dp->ageing_time;
+ }
+
+ return ageing_time;
+}
+
+static int dsa_slave_ageing_time(struct net_device *dev,
+ const struct switchdev_attr *attr,
+ struct switchdev_trans *trans)
+{
+ struct dsa_slave_priv *p = netdev_priv(dev);
+ struct dsa_switch *ds = p->parent;
+ unsigned long ageing_jiffies = clock_t_to_jiffies(attr->u.ageing_time);
+ unsigned int ageing_time = jiffies_to_msecs(ageing_jiffies);
+
+ /* bridge skips -EOPNOTSUPP, so skip the prepare phase */
+ if (switchdev_trans_ph_prepare(trans))
+ return 0;
+
+ /* Keep the fastest ageing time in case of multiple bridges */
+ ds->ports[p->port].ageing_time = ageing_time;
+ ageing_time = dsa_fastest_ageing_time(ds, ageing_time);
+
+ if (ds->drv->set_ageing_time)
+ return ds->drv->set_ageing_time(ds, ageing_time);
+
+ return 0;
+}
+
static int dsa_slave_port_attr_set(struct net_device *dev,
const struct switchdev_attr *attr,
struct switchdev_trans *trans)
@@ -346,6 +384,9 @@ static int dsa_slave_port_attr_set(struct net_device *dev,
case SWITCHDEV_ATTR_ID_BRIDGE_VLAN_FILTERING:
ret = dsa_slave_vlan_filtering(dev, attr, trans);
break;
+ case SWITCHDEV_ATTR_ID_BRIDGE_AGEING_TIME:
+ ret = dsa_slave_ageing_time(dev, attr, trans);
+ break;
default:
ret = -EOPNOTSUPP;
break;