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authorMatti Vaittinen <matti.vaittinen@fi.rohmeurope.com>2020-01-20 15:47:37 +0200
committerLee Jones <lee.jones@linaro.org>2020-01-24 07:23:10 +0000
commitc31f625d06c9166f753a2f21ac9c3f859647ca9f (patch)
treece2e9d7b5f5e18b7b339240d11ae45ed76e94413 /net/sunrpc/auth_null.c
parentfe5a591b7814ffbc90aff661aeb8264937002f54 (diff)
downloadlinux-c31f625d06c9166f753a2f21ac9c3f859647ca9f.tar.bz2
gpio: bd71828: Initial support for ROHM BD71828 PMIC GPIOs
ROHM BD71828 PMIC contains 4 pins which can be configured by OTP to be used for general purposes. First 3 can be used as outputs and 4.th pin can be used as input. Allow them to be controlled via GPIO framework. The driver assumes all of the pins are configured as GPIOs and trusts that the reserved pins in other OTP configurations are excluded from control using "gpio-reserved-ranges" device tree property (or left untouched by GPIO users). Typical use for 4.th pin (input) is to use it as HALL sensor input so that this pin state is toggled when HALL sensor detects LID position change (from close to open or open to close). PMIC HW implements some extra logic which allows PMIC to power-up the system when this pin is toggled. Please see the data sheet for details of GPIO options which can be selected by OTP settings. Signed-off-by: Matti Vaittinen <matti.vaittinen@fi.rohmeurope.com> Reviewed-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Reviewed-by: Linus Walleij <linus.walleij@linaro.org> Signed-off-by: Lee Jones <lee.jones@linaro.org>
Diffstat (limited to 'net/sunrpc/auth_null.c')
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