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authorDavid S. Miller <davem@davemloft.net>2016-07-19 19:42:02 -0700
committerDavid S. Miller <davem@davemloft.net>2016-07-19 19:42:02 -0700
commit5e31c7019f08e85d5c285befe30620f7291b4ad3 (patch)
tree25edd602c203442ec3fe5f74cb290b692742149f /net/ncsi/Makefile
parent183fc1537ec39be242dc8b619f71fc11b393d295 (diff)
parent2cfcd9641618e71a1b823324aa4737e18662c25e (diff)
downloadlinux-5e31c7019f08e85d5c285befe30620f7291b4ad3.tar.bz2
Merge branch 'dsa-mv88e6xxx-g2-cleanup-stp'
Vivien Didelot says: ==================== net: dsa: mv88e6xxx: Global2 cleanup and STP The Marvell switches registers are organized in distinct internal SMI devices, such as PHY, Port, Global 1 or Global 2 registers sets. Since not all chips support every registers sets or have slightly differences in them (such as old 88E6060 or new 88E6390 likely to be supported soon), make the setup code clearer now by removing a few family checks and adding flags to describe the Global 2 registers map. This patchset enables basic STP support and bridging on most chips when getting rid of a few inconsistencies in chip descriptions (patch 1) and add bridge Ageing Time support to DSA and the mv88e6xxx driver. Changes v2 -> v3: - rename mv88e6xxx_update_write to mv88e6xxx_update - set fastest ageing time in use in the chip for multiple bridges, tested with a few printk Changes v1 -> v2: - add a write helper for pointer-data Update registers - add ageing time support ==================== Signed-off-by: David S. Miller <davem@davemloft.net>
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