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author | Masahiro Yamada <yamada.masahiro@socionext.com> | 2018-12-06 12:55:26 +0900 |
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committer | Wolfram Sang <wsa@the-dreams.de> | 2018-12-06 23:14:59 +0100 |
commit | cd8843f541cc0ef057e27f1afba46374bbb84219 (patch) | |
tree | a110d8df03db4882e4caaeb21460e2407736d786 /net/dsa | |
parent | c2a653deaa81f5a750c0dfcbaf9f8e5195cbe4a5 (diff) | |
download | linux-cd8843f541cc0ef057e27f1afba46374bbb84219.tar.bz2 |
i2c: uniphier-f: fill TX-FIFO only in IRQ handler for repeated START
- For a repeated START condition, this controller starts data transfer
immediately after the slave address is written to the TX-FIFO.
- Once the TX-FIFO empty interrupt is asserted, the controller makes
a pause even if additional data are written to the TX-FIFO.
Given those circumstances, the data after a repeated START may not be
transferred if the interrupt is asserted while the TX-FIFO is being
filled up. A more reliable way is to append TX data only in the
interrupt handler.
Signed-off-by: Masahiro Yamada <yamada.masahiro@socionext.com>
Signed-off-by: Wolfram Sang <wsa@the-dreams.de>
Diffstat (limited to 'net/dsa')
0 files changed, 0 insertions, 0 deletions