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author | Hans de Goede <hdegoede@redhat.com> | 2018-10-14 17:12:02 +0200 |
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committer | Thierry Reding <thierry.reding@gmail.com> | 2018-10-16 13:16:15 +0200 |
commit | 2153bbc12f77fb2203276befc0f0dddbfb023bb1 (patch) | |
tree | 3e6d98a0d7406446f6a0ae470ab8f3ad0d0c1fe0 /mm | |
parent | 4743765babb278a7d399df5733fc8a6b6bbedf3e (diff) | |
download | linux-2153bbc12f77fb2203276befc0f0dddbfb023bb1.tar.bz2 |
pwm: lpss: Only set update bit if we are actually changing the settings
According to the datasheet the update bit must be set if the on-time-div
or the base-unit changes.
Now that we properly order device resume on Cherry Trail so that the GFX0
_PS0 method no longer exits with an error, we end up with a sequence of
events where we are writing the same values twice in a row.
First the _PS0 method restores the duty cycle of 0% the GPU driver set
on suspend and then the GPU driver first updates just the enabled bit in
the pwm_state from 0 to 1, causing us to write the same values again,
before restoring the pre-suspend duty-cycle in a separate pwm_apply call.
When writing the update bit the second time, without changing any of
the values the update bit clears immediately / instantly, instead of
staying 1 for a while as usual. After this the next setting of the update
bit seems to be ignored, causing the restoring of the pre-suspend
duty-cycle to not get applied. This makes the backlight come up with
a 0% dutycycle after suspend/resume.
Any further brightness changes after this do work.
This commit moves the setting of the update bit into pwm_lpss_prepare()
and only sets the bit if we have actually changed any of the values.
This avoids the setting of the update bit the second time we configure
the PWM to 0% dutycycle, this fixes the backlight coming up with 0%
duty-cycle after a suspend/resume.
Signed-off-by: Hans de Goede <hdegoede@redhat.com>
Signed-off-by: Thierry Reding <thierry.reding@gmail.com>
Diffstat (limited to 'mm')
0 files changed, 0 insertions, 0 deletions