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authorRoy Spliet <r.spliet@ultimaker.com>2015-06-26 11:00:10 +0200
committerBrian Norris <computersforpeace@gmail.com>2015-07-20 10:45:52 -0700
commit9c618292dba6aa9b82e8a2e4e6fe70f54bd87a81 (patch)
tree8fe5fcf49544b2450ec33a8c56f202c8b3a8887c /mm/swap.c
parent0db7fae2736d0db920905c1fb576ec7eab2660c8 (diff)
downloadlinux-9c618292dba6aa9b82e8a2e4e6fe70f54bd87a81.tar.bz2
mtd: nand: sunxi: Replace failsafe timing cfg with calculated value
The TIMING_CFG register was previously statically set to a magic value (extracted from Allwinner's BSP) when initializing the NAND controller. Now that we have more details about the TIMING_CFG register layout (extracted from the A83 user manual) we can dynamically calculate the appropriate value for each NAND chip and set it when selecting the chip. Signed-off-by: Roy Spliet <r.spliet@ultimaker.com> Acked-by: Boris Brezillon <boris.brezillon@free-electrons.com> Signed-off-by: Brian Norris <computersforpeace@gmail.com>
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