diff options
| author | BOUGH CHEN <haibo.chen@nxp.com> | 2019-02-27 08:24:48 +0000 |
|---|---|---|
| committer | Ulf Hansson <ulf.hansson@linaro.org> | 2019-02-28 09:16:12 +0100 |
| commit | 85236d2be844ade0bd8b34e3626fc3e36498cd85 (patch) | |
| tree | 878ec2d3f86883b8d8390c1a2684906c26aa323c /mm/list_lru.c | |
| parent | 3a0681c7448b174e5dcfd19e9079cdd281c35f1a (diff) | |
| download | linux-85236d2be844ade0bd8b34e3626fc3e36498cd85.tar.bz2 | |
mmc: sdhci-esdhc-imx: clear the HALT bit when enable CQE
After system suspend, CQE is in cqhci_off state, which set the HALT bit, make
CQE in HALT state. If the SoC do not power down the USDHC module, then when
system resume back, this bit keep the same, still set. Though there is a
sdhci reset during sdhci_resume_host(), but this reset do not impact the
CQE part, so need to clear this bit when enable CQE, otherwise CQE will
stuck in the first CMDQ request after system resume back.
Find this issue on NXP i.MX845s-mek board
[ 105.919862] mmc2: cqhci: timeout for tag 6
[ 105.923965] mmc2: cqhci: ============ CQHCI REGISTER DUMP ===========
[ 105.930407] mmc2: cqhci: Caps: 0x0000310a | Version: 0x00000510
[ 105.936847] mmc2: cqhci: Config: 0x00001001 | Control: 0x00000001
[ 105.943286] mmc2: cqhci: Int stat: 0x00000000 | Int enab: 0x00000006
[ 105.949725] mmc2: cqhci: Int sig: 0x00000006 | Int Coal: 0x00000000
[ 105.956164] mmc2: cqhci: TDL base: 0x7809b000 | TDL up32: 0x00000000
[ 105.962604] mmc2: cqhci: Doorbell: 0x00000040 | TCN: 0x00000000
[ 105.969043] mmc2: cqhci: Dev queue: 0x00000000 | Dev Pend: 0x00000000
[ 105.975483] mmc2: cqhci: Task clr: 0x00000000 | SSC1: 0x00011000
[ 105.981922] mmc2: cqhci: SSC2: 0x00000001 | DCMD rsp: 0x00000000
[ 105.988362] mmc2: cqhci: RED mask: 0xfdf9a080 | TERRI: 0x00000000
[ 105.994801] mmc2: cqhci: Resp idx: 0x00000000 | Resp arg: 0x00000000
[ 106.001240] mmc2: sdhci: ============ SDHCI REGISTER DUMP ===========
[ 106.007680] mmc2: sdhci: Sys addr: 0xb2b37800 | Version: 0x00000002
[ 106.014120] mmc2: sdhci: Blk size: 0x00000200 | Blk cnt: 0x00000001
[ 106.020560] mmc2: sdhci: Argument: 0x00010000 | Trn mode: 0x00000013
[ 106.026999] mmc2: sdhci: Present: 0x01f88008 | Host ctl: 0x00000030
[ 106.033439] mmc2: sdhci: Power: 0x00000002 | Blk gap: 0x00000080
[ 106.039878] mmc2: sdhci: Wake-up: 0x00000008 | Clock: 0x0000000f
[ 106.046318] mmc2: sdhci: Timeout: 0x0000008f | Int stat: 0x00000000
[ 106.052757] mmc2: sdhci: Int enab: 0x107f4000 | Sig enab: 0x107f4000
[ 106.059196] mmc2: sdhci: AC12 err: 0x00000000 | Slot int: 0x00000502
[ 106.065635] mmc2: sdhci: Caps: 0x07eb0000 | Caps_1: 0x8000b407
[ 106.072075] mmc2: sdhci: Cmd: 0x00000d1a | Max curr: 0x00ffffff
[ 106.078514] mmc2: sdhci: Resp[0]: 0x00000900 | Resp[1]: 0x31360181
[ 106.084954] mmc2: sdhci: Resp[2]: 0x44473430 | Resp[3]: 0x00450100
[ 106.091392] mmc2: sdhci: Host ctl2: 0x00000008
[ 106.095836] mmc2: sdhci: ADMA Err: 0x00000000 | ADMA Ptr: 0x7804b208
[ 106.102274] mmc2: sdhci: ============================================
[ 106.108785] mmc2: running CQE recovery
Signed-off-by: Haibo Chen <haibo.chen@nxp.com>
Acked-by: Adrian Hunter <adrian.hunter@intel.com>
Signed-off-by: Ulf Hansson <ulf.hansson@linaro.org>
Diffstat (limited to 'mm/list_lru.c')
0 files changed, 0 insertions, 0 deletions