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author | Suzuki K Poulose <suzuki.poulose@arm.com> | 2016-08-25 15:18:58 -0600 |
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committer | Greg Kroah-Hartman <gregkh@linuxfoundation.org> | 2016-08-31 13:05:42 +0200 |
commit | 78247e25e89b135e8401767e20fa7c814a17479a (patch) | |
tree | 4ec8164f386d5c11d04beabc44de8e3fd556a226 /lib/.gitignore | |
parent | 8505feaed9246791e94c30e8bf52fa4c3ef2e7af (diff) | |
download | linux-78247e25e89b135e8401767e20fa7c814a17479a.tar.bz2 |
coresight: etmv4: Fix ETMv4x peripheral ID table
This patch cleans up the peripheral id table for different ETMv4
implementations.
As per Cortex-A53 TRM, the ETM has following id values:
Peripheral ID0 0x5D 0xFE0
Peripheral ID1 0xB9 0xFE4
Peripheral ID2 0x4B 0xFE8
Peripheral ID3 0x00 0xFEC
where, PID2: has the following format:
[7:4] Revision
[3] JEDEC 0b1 res1. Indicates a JEP106 identity code is used
[2:0] DES_1 0b011 ARM Limited. This is bits[6:4] of JEP106 ID code
The existing table entry checks only the bits [1:0], which is not
sufficient enough. Fix it to match bits [3:0], just like the other
entries do. While at it, correct the comment for A57 and the A53 entry.
Cc: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Signed-off-by: Mathieu Poirier <mathieu.poirier@linaro.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
Diffstat (limited to 'lib/.gitignore')
0 files changed, 0 insertions, 0 deletions