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author | Mark Brown <broonie@kernel.org> | 2019-01-29 17:17:03 +0000 |
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committer | Mark Brown <broonie@kernel.org> | 2019-01-29 17:17:03 +0000 |
commit | 66fb181d6f824f7695417e8c19560c5b57dc8c2d (patch) | |
tree | 815dce4b2b8303ed3c1d751deb6b7dfedf7a1177 /include | |
parent | 31172d100256d0b6dc36e11437dda918b954ce96 (diff) | |
parent | a2d21848d9211dad5e786aa7368709ca8938834e (diff) | |
download | linux-66fb181d6f824f7695417e8c19560c5b57dc8c2d.tar.bz2 |
Merge remote-tracking branch 'regmap/topic/irq' into regmap-next
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/regmap.h | 31 |
1 files changed, 31 insertions, 0 deletions
diff --git a/include/linux/regmap.h b/include/linux/regmap.h index 1781b6cb793c..daeec7dbd65c 100644 --- a/include/linux/regmap.h +++ b/include/linux/regmap.h @@ -1131,11 +1131,37 @@ struct regmap_irq { .reg_offset = (_id) / (_reg_bits), \ } +#define REGMAP_IRQ_MAIN_REG_OFFSET(arr) \ + { .num_regs = ARRAY_SIZE((arr)), .offset = &(arr)[0] } + +struct regmap_irq_sub_irq_map { + unsigned int num_regs; + unsigned int *offset; +}; + /** * struct regmap_irq_chip - Description of a generic regmap irq_chip. * * @name: Descriptive name for IRQ controller. * + * @main_status: Base main status register address. For chips which have + * interrupts arranged in separate sub-irq blocks with own IRQ + * registers and which have a main IRQ registers indicating + * sub-irq blocks with unhandled interrupts. For such chips fill + * sub-irq register information in status_base, mask_base and + * ack_base. + * @num_main_status_bits: Should be given to chips where number of meaningfull + * main status bits differs from num_regs. + * @sub_reg_offsets: arrays of mappings from main register bits to sub irq + * registers. First item in array describes the registers + * for first main status bit. Second array for second bit etc. + * Offset is given as sub register status offset to + * status_base. Should contain num_regs arrays. + * Can be provided for chips with more complex mapping than + * 1.st bit to 1.st sub-reg, 2.nd bit to 2.nd sub-reg, ... + * @num_main_regs: Number of 'main status' irq registers for chips which have + * main_status set. + * * @status_base: Base status register address. * @mask_base: Base mask register address. * @mask_writeonly: Base mask register is write only. @@ -1181,6 +1207,11 @@ struct regmap_irq { struct regmap_irq_chip { const char *name; + unsigned int main_status; + unsigned int num_main_status_bits; + struct regmap_irq_sub_irq_map *sub_reg_offsets; + int num_main_regs; + unsigned int status_base; unsigned int mask_base; unsigned int unmask_base; |