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| author | Linus Torvalds <torvalds@linux-foundation.org> | 2013-12-08 18:45:55 -0800 |
|---|---|---|
| committer | Linus Torvalds <torvalds@linux-foundation.org> | 2013-12-08 18:45:55 -0800 |
| commit | 7d49efe2edbde8e2b585f3168fa89184893645c8 (patch) | |
| tree | 34a5bfde8ff1de0bb9640fbf1a5f42f46a249e5a /include | |
| parent | 374b105797c3d4f29c685f3be535c35f5689b30e (diff) | |
| parent | db4ed53cfe9f5a00355891a631d47dfa3fd4541f (diff) | |
| download | linux-7d49efe2edbde8e2b585f3168fa89184893645c8.tar.bz2 | |
Merge tag 'arm64-stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64
Pull ARM64 fixes from Catalin Marinas:
- Page table fixes (PROT_NONE, shareability attribute, TLB
invalidation)
- Secondary CPUs entry endianness fix
- Make NR_CPUS default to 8
* tag 'arm64-stable' of git://git.kernel.org/pub/scm/linux/kernel/git/cmarinas/linux-aarch64:
arm64: mm: Fix PMD_SECT_PROT_NONE definition
arm64: Fix memory shareability attribute for ioremap_wc/cache
arm64: kernel: add code to set cpu boot mode to secondary_entry shim
arm64: make default NR_CPUS 8
arm64: ensure completion of TLB invalidatation
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions