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authorBartosz Golaszewski <bgolaszewski@baylibre.com>2018-12-19 12:18:05 +0100
committerMark Brown <broonie@kernel.org>2018-12-19 18:38:13 +0000
commitc82ea33ead18801605b236523f21e5c893c7c253 (patch)
treeb4b523aac45485555343e4ff9133c529a6ecd38e /include
parent1c2928e3e3212252b505b746ec10951027a95813 (diff)
downloadlinux-c82ea33ead18801605b236523f21e5c893c7c253.tar.bz2
regmap: irq: add an option to clear status registers on unmask
Some interrupt controllers whose interrupts are acked on read will set the status bits for masked interrupts without changing the state of the IRQ line. Some chips have an additional "feature" where if those set bits are not cleared before unmasking their respective interrupts, the IRQ line will change the state and we'll interpret this as an interrupt although it actually fired when it was masked. Add a new field to the irq chip struct that tells the regmap irq chip code to always clear the status registers before actually changing the irq mask values. Signed-off-by: Bartosz Golaszewski <bgolaszewski@baylibre.com> Signed-off-by: Mark Brown <broonie@kernel.org>
Diffstat (limited to 'include')
-rw-r--r--include/linux/regmap.h4
1 files changed, 4 insertions, 0 deletions
diff --git a/include/linux/regmap.h b/include/linux/regmap.h
index 0f1832e4c2c8..1781b6cb793c 100644
--- a/include/linux/regmap.h
+++ b/include/linux/regmap.h
@@ -1155,6 +1155,9 @@ struct regmap_irq {
* @type_in_mask: Use the mask registers for controlling irq type. For
* interrupts defining type_rising/falling_mask use mask_base
* for edge configuration and never update bits in type_base.
+ * @clear_on_unmask: For chips with interrupts cleared on read: read the status
+ * registers before unmasking interrupts to clear any bits
+ * set when they were masked.
* @runtime_pm: Hold a runtime PM lock on the device when accessing it.
*
* @num_regs: Number of registers in each control bank.
@@ -1194,6 +1197,7 @@ struct regmap_irq_chip {
bool runtime_pm:1;
bool type_invert:1;
bool type_in_mask:1;
+ bool clear_on_unmask:1;
int num_regs;