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| author | Andy Shevchenko <andriy.shevchenko@linux.intel.com> | 2017-08-04 19:26:34 +0300 |
|---|---|---|
| committer | Linus Walleij <linus.walleij@linaro.org> | 2017-08-07 15:23:11 +0200 |
| commit | 5d996132d921c391af5f267123eca1a6a3148ecd (patch) | |
| tree | 54d759f27596155a1ae9dd7fc97525fdafef3414 /include | |
| parent | 6b67c3906cd74d88da4f6717b4b294bd52fce56a (diff) | |
| download | linux-5d996132d921c391af5f267123eca1a6a3148ecd.tar.bz2 | |
pinctrl: intel: merrifield: Correct UART pin lists
UART pin lists consist GPIO numbers which is simply wrong.
Replace it by pin numbers.
Fixes: 4e80c8f50574 ("pinctrl: intel: Add Intel Merrifield pin controller support")
Signed-off-by: Andy Shevchenko <andriy.shevchenko@linux.intel.com>
Acked-by: Mika Westerberg <mika.westerberg@linux.intel.com>
Signed-off-by: Linus Walleij <linus.walleij@linaro.org>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions