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author | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-03 15:50:35 -0800 |
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committer | Linus Torvalds <torvalds@g5.osdl.org> | 2006-02-03 15:50:35 -0800 |
commit | 1a56f54c351d8d2e276aefc4f4094037c178d6c7 (patch) | |
tree | 88abb7801141db3d03079bd0ef2a903cbf3a1aba /include | |
parent | d1ffa5669cd834f901141756e63195f48c1bfbf9 (diff) | |
parent | 2c4c6b27028b38204de8ade505f925d53d234422 (diff) | |
download | linux-1a56f54c351d8d2e276aefc4f4094037c178d6c7.tar.bz2 |
Merge master.kernel.org:/home/rmk/linux-2.6-arm
Diffstat (limited to 'include')
-rw-r--r-- | include/asm-arm/arch-s3c2410/hardware.h | 7 | ||||
-rw-r--r-- | include/asm-arm/arch-s3c2410/regs-gpio.h | 22 | ||||
-rw-r--r-- | include/asm-arm/checksum.h | 2 |
3 files changed, 30 insertions, 1 deletions
diff --git a/include/asm-arm/arch-s3c2410/hardware.h b/include/asm-arm/arch-s3c2410/hardware.h index 1c9de29cafef..a2330bf83695 100644 --- a/include/asm-arm/arch-s3c2410/hardware.h +++ b/include/asm-arm/arch-s3c2410/hardware.h @@ -17,6 +17,7 @@ * 14-Sep-2004 BJD Added misccr and getpin to gpio * 01-Oct-2004 BJD Added the new gpio functions * 16-Oct-2004 BJD Removed the clock variables + * 15-Jan-2006 LCVR Added s3c2400_gpio_getirq() */ #ifndef __ASM_ARCH_HARDWARE_H @@ -55,6 +56,12 @@ extern unsigned int s3c2410_gpio_getcfg(unsigned int pin); extern int s3c2410_gpio_getirq(unsigned int pin); +#ifdef CONFIG_CPU_S3C2400 + +extern int s3c2400_gpio_getirq(unsigned int pin); + +#endif /* CONFIG_CPU_S3C2400 */ + /* s3c2410_gpio_irqfilter * * set the irq filtering on the given pin diff --git a/include/asm-arm/arch-s3c2410/regs-gpio.h b/include/asm-arm/arch-s3c2410/regs-gpio.h index 7f1be48ad67e..9697f93afe74 100644 --- a/include/asm-arm/arch-s3c2410/regs-gpio.h +++ b/include/asm-arm/arch-s3c2410/regs-gpio.h @@ -22,6 +22,7 @@ * 28-Mar-2005 LCVR Fixed definition of GPB10 * 26-Oct-2005 BJD Added generic configuration types * 27-Nov-2005 LCVR Added definitions to S3C2400 registers + * 15-Jan-2006 LCVR Written S3C24XX_GPIO_BASE() macro */ @@ -39,6 +40,27 @@ #define S3C2410_GPIO_BANKG (32*6) #define S3C2410_GPIO_BANKH (32*7) +#ifdef CONFIG_CPU_S3C2400 +#define S3C24XX_GPIO_BASE(x) S3C2400_GPIO_BASE(x) +#define S3C24XX_MISCCR S3C2400_MISCCR +#else +#define S3C24XX_GPIO_BASE(x) S3C2410_GPIO_BASE(x) +#define S3C24XX_MISCCR S3C2410_MISCCR +#endif /* CONFIG_CPU_S3C2400 */ + + +/* S3C2400 doesn't have a 1:1 mapping to S3C2410 gpio base pins */ + +#define S3C2400_BANKNUM(pin) (((pin) & ~31) / 32) +#define S3C2400_BASEA2B(pin) ((((pin) & ~31) >> 2)) +#define S3C2400_BASEC2H(pin) ((S3C2400_BANKNUM(pin) * 10) + \ + (2 * (S3C2400_BANKNUM(pin)-2))) + +#define S3C2400_GPIO_BASE(pin) (pin < S3C2410_GPIO_BANKC ? \ + S3C2400_BASEA2B(pin)+S3C24XX_VA_GPIO : \ + S3C2400_BASEC2H(pin)+S3C24XX_VA_GPIO) + + #define S3C2410_GPIO_BASE(pin) ((((pin) & ~31) >> 1) + S3C24XX_VA_GPIO) #define S3C2410_GPIO_OFFSET(pin) ((pin) & 31) diff --git a/include/asm-arm/checksum.h b/include/asm-arm/checksum.h index d4256d5f3a7c..747bdd31a74b 100644 --- a/include/asm-arm/checksum.h +++ b/include/asm-arm/checksum.h @@ -77,7 +77,7 @@ ip_fast_csum(unsigned char * iph, unsigned int ihl) mov %0, %0, lsr #16" : "=r" (sum), "=r" (iph), "=r" (ihl), "=r" (tmp1) : "1" (iph), "2" (ihl) - : "cc"); + : "cc", "memory"); return sum; } |