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author | Boyuan Zhang <boyuan.zhang@amd.com> | 2020-03-26 19:16:43 -0400 |
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committer | Alex Deucher <alexander.deucher@amd.com> | 2020-07-01 01:59:12 -0400 |
commit | 14539809bdfc623204e80a3a8540389d6b3b369d (patch) | |
tree | 6be44b0ad2614907e3584d06d2ad89bcfda24052 /include | |
parent | c0f136ee8d7e3d85a5ca2184b1c5fe73c0f819bc (diff) | |
download | linux-14539809bdfc623204e80a3a8540389d6b3b369d.tar.bz2 |
drm/amdgpu: add internal reg offset translation for VCN inst 1
Add range for vcn instance 1 for translation for internal register offset, which
is needed for VCN3.0
V2: update description.
Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: James Zhu <james.zhu@amd.com>
Acked-by: Alex Deucher <alexander.deucher@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
Diffstat (limited to 'include')
0 files changed, 0 insertions, 0 deletions