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author | Linus Torvalds <torvalds@linux-foundation.org> | 2020-12-16 15:02:49 -0800 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2020-12-16 15:02:49 -0800 |
commit | f68e4041ef63f03091e44b4eebf1ab5c5d427e6f (patch) | |
tree | 9ff864e69caf508408f98fefedb15a5098910587 /include | |
parent | a701262c02cec71dc29b10fe910ba3c2298f5ba3 (diff) | |
parent | 3df09cb8c92e2bdfb78c81f678f6990bd780f09a (diff) | |
download | linux-f68e4041ef63f03091e44b4eebf1ab5c5d427e6f.tar.bz2 |
Merge tag 'pinctrl-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij:
"This is the bulk of pin control changes for the v5.11 kernel.
Drivers, drivers and drivers. Not a single core change.
Some new stuff, especially a bunch of new Intel, Qualcomm and Ocelot
SoCs.
As part of the modularization attempt, I applied one patch affecting
the firmware subsystem as a functional (not syntactic/semantic)
dependency and then it blew up in our face, so I had to revert it,
bummer. It will come in later, through that subsystem, I guess.
New drivers:
- New driver for the Microchip Serial GPIO "SGPIO".
- Qualcomm SM8250 LPASS (Low Power Audio Subsystem) GPIO driver.
New subdrivers:
- Intel Lakefield subdriver.
- Intel Elkhart Lake subdriver.
- Intel Alder Lake-S subdriver.
- Qualcomm MSM8953 subdriver.
- Qualcomm SDX55 subdriver.
- Qualcomm SDX55 PMIC subdriver.
- Ocelot Luton SoC subdriver.
- Ocelot Serval SoC subdriver.
Modularization:
- The Meson driver can now be built as modules.
- The Qualcomm driver(s) can now be built as modules.
Incremental improvements:
- The Intel driver now supports pin configuration for GPIO-related
configurations.
- A bunch of Renesas PFC drivers have been augmented with support for
QSPI pins, groups and functions.
- Non-critical fixes to the irq handling in the Allwinner Sunxi
driver"
* tag 'pinctrl-v5.11-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (80 commits)
pinctrl/spear: simplify the return expression of spear300_pinctrl_probe()
pinctrl: mediatek: simplify the return expression of mtk_pinconf_bias_disable_set_rev1()
dt-bindings: pinctrl: pinctrl-microchip-sgpio: Add irq support
pinctrl: pinctrl-microchip-sgpio: Add irq support (for sparx5)
pinctrl: qcom: Add sm8250 lpass lpi pinctrl driver
dt-bindings: pinctrl: qcom: Add sm8250 lpass lpi pinctrl bindings
pinctrl: qcom-pmic-gpio: Add support for pmx55
dt-bindings: pinctrl: qcom-pmic-gpio: Add pmx55 support
pinctrl: pinctrl-microchip-sgpio: Mark some symbols with static keyword
pinctrl: at91-pio4: Make PINCTRL_AT91PIO4 depend on HAS_IOMEM to fix build error
pinctrl: mtk: Fix low level output voltage issue
pinctrl: falcon: add missing put_device() call in pinctrl_falcon_probe()
pinctrl: actions: pinctrl-s500: Constify s500_padinfo[]
pinctrl: pinctrl-microchip-sgpio: Add OF config dependency
pinctrl: pinctrl-microchip-sgpio: Add pinctrl driver for Microsemi Serial GPIO
dt-bindings: pinctrl: Add bindings for pinctrl-microchip-sgpio driver
pinctrl: at91-pio4: add support for fewer lines on last PIO bank
pinctrl: sunxi: Always call chained_irq_{enter, exit} in sunxi_pinctrl_irq_handler
pinctrl: sunxi: Mark the irq bank not found in sunxi_pinctrl_irq_handler() with WARN_ON
pinctrl: sunxi: fix irq bank map for the Allwinner A100 pin controller
...
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/pinctrl/pinctrl.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/linux/pinctrl/pinctrl.h b/include/linux/pinctrl/pinctrl.h index 2aef59df93d7..70b45d28e7a9 100644 --- a/include/linux/pinctrl/pinctrl.h +++ b/include/linux/pinctrl/pinctrl.h @@ -51,8 +51,8 @@ struct pinctrl_pin_desc { * @id: an ID number for the chip in this range * @base: base offset of the GPIO range * @pin_base: base pin number of the GPIO range if pins == NULL - * @pins: enumeration of pins in GPIO range or NULL * @npins: number of pins in the GPIO range, including the base number + * @pins: enumeration of pins in GPIO range or NULL * @gc: an optional pointer to a gpio_chip */ struct pinctrl_gpio_range { @@ -61,8 +61,8 @@ struct pinctrl_gpio_range { unsigned int id; unsigned int base; unsigned int pin_base; - unsigned const *pins; unsigned int npins; + unsigned const *pins; struct gpio_chip *gc; }; |