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authorLinus Torvalds <torvalds@linux-foundation.org>2017-07-04 14:47:47 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2017-07-04 14:47:47 -0700
commite8547112910540afb71589ee807ae6a4259f9755 (patch)
tree7d3d7eb17be4e6d2b181bffc4d471e93063674b4 /include
parent9ce32ac8f83729aca9f45ce9598dbc5451d1044b (diff)
parentffe3744a591fdce695da6b891378261e2caedc69 (diff)
downloadlinux-e8547112910540afb71589ee807ae6a4259f9755.tar.bz2
Merge tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc
Pull ARM SoC driver updates from Arnd Bergmann: "New SoC specific drivers: - NVIDIA Tegra PM Domain support for newer SoCs (Tegra186 and later) based on the "BPMP" firmware - Clocksource and system controller drivers for the newly added Action Semi platforms (both arm and arm64). Reset subsystem, merged through arm-soc by tradition: - New drivers for Altera Stratix10, TI Keystone and Cortina Gemini SoCs - Various subsystem-wide cleanups Updates for existing SoC-specific drivers - TI GPMC (General Purpose Memory Controller) - Mediatek "scpsys" system controller support for MT6797 - Broadcom "brcmstb_gisb" bus arbitrer - ARM SCPI firmware - Renesas "SYSC" system controller One more driver update was submitted for the Freescale/NXP DPAA data path acceleration that has previously been used on PowerPC chips. I ended up postponing the merge until some API questions for its unusual MMIO access are resolved" * tag 'armsoc-drivers' of git://git.kernel.org/pub/scm/linux/kernel/git/arm/arm-soc: (35 commits) clocksource: owl: Add S900 support clocksource: Add Owl timer soc: renesas: rcar-sysc: Use GENPD_FLAG_ALWAYS_ON firmware: tegra: Fix locking bugs in BPMP soc/tegra: flowctrl: Fix error handling soc/tegra: bpmp: Implement generic PM domains soc/tegra: bpmp: Update ABI header PM / Domains: Allow overriding the ->xlate() callback soc: brcmstb: enable drivers for ARM64 and BMIPS soc: renesas: Rework Kconfig and Makefile logic reset: Add the TI SCI reset driver dt-bindings: reset: Add TI SCI reset binding reset: use kref for reference counting soc: qcom: smsm: Improve error handling, quiesce probe deferral cpufreq: scpi: use new scpi_ops functions to remove duplicate code firmware: arm_scpi: add support to populate OPPs and get transition latency dt-bindings: reset: Add reset manager offsets for Stratix10 memory: omap-gpmc: add error message if bank-width property is absent memory: omap-gpmc: make dts snippet include semicolon reset: Add a Gemini reset controller ...
Diffstat (limited to 'include')
-rw-r--r--include/dt-bindings/power/mt6797-power.h30
-rw-r--r--include/dt-bindings/reset/altr,rst-mgr-s10.h108
-rw-r--r--include/dt-bindings/reset/cortina,gemini-reset.h36
-rw-r--r--include/linux/pm_domain.h4
-rw-r--r--include/linux/scpi_protocol.h3
-rw-r--r--include/linux/soc/renesas/rcar-rst.h3
-rw-r--r--include/soc/tegra/bpmp-abi.h418
-rw-r--r--include/soc/tegra/bpmp.h12
8 files changed, 602 insertions, 12 deletions
diff --git a/include/dt-bindings/power/mt6797-power.h b/include/dt-bindings/power/mt6797-power.h
new file mode 100644
index 000000000000..a60c1d81cf75
--- /dev/null
+++ b/include/dt-bindings/power/mt6797-power.h
@@ -0,0 +1,30 @@
+/*
+ * Copyright (c) 2017 MediaTek Inc.
+ * Author: Mars.C <mars.cheng@mediatek.com>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License version 2 as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#ifndef _DT_BINDINGS_POWER_MT6797_POWER_H
+#define _DT_BINDINGS_POWER_MT6797_POWER_H
+
+#define MT6797_POWER_DOMAIN_VDEC 0
+#define MT6797_POWER_DOMAIN_VENC 1
+#define MT6797_POWER_DOMAIN_ISP 2
+#define MT6797_POWER_DOMAIN_MM 3
+#define MT6797_POWER_DOMAIN_AUDIO 4
+#define MT6797_POWER_DOMAIN_MFG_ASYNC 5
+#define MT6797_POWER_DOMAIN_MFG 6
+#define MT6797_POWER_DOMAIN_MFG_CORE0 7
+#define MT6797_POWER_DOMAIN_MFG_CORE1 8
+#define MT6797_POWER_DOMAIN_MFG_CORE2 9
+#define MT6797_POWER_DOMAIN_MFG_CORE3 10
+#define MT6797_POWER_DOMAIN_MJC 11
+
+#endif /* _DT_BINDINGS_POWER_MT6797_POWER_H */
diff --git a/include/dt-bindings/reset/altr,rst-mgr-s10.h b/include/dt-bindings/reset/altr,rst-mgr-s10.h
new file mode 100644
index 000000000000..7978c21e4fad
--- /dev/null
+++ b/include/dt-bindings/reset/altr,rst-mgr-s10.h
@@ -0,0 +1,108 @@
+/*
+ * Copyright (C) 2016 Intel Corporation. All rights reserved
+ * Copyright (C) 2016 Altera Corporation. All rights reserved
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms and conditions of the GNU General Public License,
+ * version 2, as published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope it will be useful, but WITHOUT
+ * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
+ * FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License for
+ * more details.
+ *
+ * You should have received a copy of the GNU General Public License along with
+ * this program. If not, see <http://www.gnu.org/licenses/>.
+ *
+ * derived from Steffen Trumtrar's "altr,rst-mgr-a10.h"
+ */
+
+#ifndef _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H
+#define _DT_BINDINGS_RESET_ALTR_RST_MGR_S10_H
+
+/* MPUMODRST */
+#define CPU0_RESET 0
+#define CPU1_RESET 1
+#define CPU2_RESET 2
+#define CPU3_RESET 3
+
+/* PER0MODRST */
+#define EMAC0_RESET 32
+#define EMAC1_RESET 33
+#define EMAC2_RESET 34
+#define USB0_RESET 35
+#define USB1_RESET 36
+#define NAND_RESET 37
+/* 38 is empty */
+#define SDMMC_RESET 39
+#define EMAC0_OCP_RESET 40
+#define EMAC1_OCP_RESET 41
+#define EMAC2_OCP_RESET 42
+#define USB0_OCP_RESET 43
+#define USB1_OCP_RESET 44
+#define NAND_OCP_RESET 45
+/* 46 is empty */
+#define SDMMC_OCP_RESET 47
+#define DMA_RESET 48
+#define SPIM0_RESET 49
+#define SPIM1_RESET 50
+#define SPIS0_RESET 51
+#define SPIS1_RESET 52
+#define DMA_OCP_RESET 53
+#define EMAC_PTP_RESET 54
+/* 55 is empty*/
+#define DMAIF0_RESET 56
+#define DMAIF1_RESET 57
+#define DMAIF2_RESET 58
+#define DMAIF3_RESET 59
+#define DMAIF4_RESET 60
+#define DMAIF5_RESET 61
+#define DMAIF6_RESET 62
+#define DMAIF7_RESET 63
+
+/* PER1MODRST */
+#define WATCHDOG0_RESET 64
+#define WATCHDOG1_RESET 65
+#define WATCHDOG2_RESET 66
+#define WATCHDOG3_RESET 67
+#define L4SYSTIMER0_RESET 68
+#define L4SYSTIMER1_RESET 69
+#define SPTIMER0_RESET 70
+#define SPTIMER1_RESET 71
+#define I2C0_RESET 72
+#define I2C1_RESET 73
+#define I2C2_RESET 74
+#define I2C3_RESET 75
+#define I2C4_RESET 76
+/* 77-79 is empty */
+#define UART0_RESET 80
+#define UART1_RESET 81
+/* 82-87 is empty */
+#define GPIO0_RESET 88
+#define GPIO1_RESET 89
+
+/* BRGMODRST */
+#define SOC2FPGA_RESET 96
+#define LWHPS2FPGA_RESET 97
+#define FPGA2SOC_RESET 98
+#define F2SSDRAM0_RESET 99
+#define F2SSDRAM1_RESET 100
+#define F2SSDRAM2_RESET 101
+#define DDRSCH_RESET 102
+
+/* COLDMODRST */
+#define CPUPO0_RESET 160
+#define CPUPO1_RESET 161
+#define CPUPO2_RESET 162
+#define CPUPO3_RESET 163
+/* 164-167 is empty */
+#define L2_RESET 168
+
+/* DBGMODRST */
+#define DBG_RESET 224
+#define CSDAP_RESET 225
+
+/* TAPMODRST */
+#define TAP_RESET 256
+
+#endif
diff --git a/include/dt-bindings/reset/cortina,gemini-reset.h b/include/dt-bindings/reset/cortina,gemini-reset.h
new file mode 100644
index 000000000000..0b886aee65e3
--- /dev/null
+++ b/include/dt-bindings/reset/cortina,gemini-reset.h
@@ -0,0 +1,36 @@
+#ifndef _DT_BINDINGS_RESET_CORTINA_GEMINI_H
+#define _DT_BINDINGS_RESET_CORTINA_GEMINI_H
+
+#define GEMINI_RESET_DRAM 0
+#define GEMINI_RESET_FLASH 1
+#define GEMINI_RESET_IDE 2
+#define GEMINI_RESET_RAID 3
+#define GEMINI_RESET_SECURITY 4
+#define GEMINI_RESET_GMAC0 5
+#define GEMINI_RESET_GMAC1 6
+#define GEMINI_RESET_PCI 7
+#define GEMINI_RESET_USB0 8
+#define GEMINI_RESET_USB1 9
+#define GEMINI_RESET_DMAC 10
+#define GEMINI_RESET_APB 11
+#define GEMINI_RESET_LPC 12
+#define GEMINI_RESET_LCD 13
+#define GEMINI_RESET_INTCON0 14
+#define GEMINI_RESET_INTCON1 15
+#define GEMINI_RESET_RTC 16
+#define GEMINI_RESET_TIMER 17
+#define GEMINI_RESET_UART 18
+#define GEMINI_RESET_SSP 19
+#define GEMINI_RESET_GPIO0 20
+#define GEMINI_RESET_GPIO1 21
+#define GEMINI_RESET_GPIO2 22
+#define GEMINI_RESET_WDOG 23
+#define GEMINI_RESET_EXTERN 24
+#define GEMINI_RESET_CIR 25
+#define GEMINI_RESET_SATA0 26
+#define GEMINI_RESET_SATA1 27
+#define GEMINI_RESET_TVC 28
+#define GEMINI_RESET_CPU1 30
+#define GEMINI_RESET_GLOBAL 31
+
+#endif
diff --git a/include/linux/pm_domain.h b/include/linux/pm_domain.h
index b7803a251044..41004d97cefa 100644
--- a/include/linux/pm_domain.h
+++ b/include/linux/pm_domain.h
@@ -206,9 +206,13 @@ static inline void pm_genpd_syscore_poweron(struct device *dev) {}
/* OF PM domain providers */
struct of_device_id;
+typedef struct generic_pm_domain *(*genpd_xlate_t)(struct of_phandle_args *args,
+ void *data);
+
struct genpd_onecell_data {
struct generic_pm_domain **domains;
unsigned int num_domains;
+ genpd_xlate_t xlate;
};
#ifdef CONFIG_PM_GENERIC_DOMAINS_OF
diff --git a/include/linux/scpi_protocol.h b/include/linux/scpi_protocol.h
index dc5f989be226..327d65663dbf 100644
--- a/include/linux/scpi_protocol.h
+++ b/include/linux/scpi_protocol.h
@@ -67,6 +67,9 @@ struct scpi_ops {
int (*dvfs_get_idx)(u8);
int (*dvfs_set_idx)(u8, u8);
struct scpi_dvfs_info *(*dvfs_get_info)(u8);
+ int (*device_domain_id)(struct device *);
+ int (*get_transition_latency)(struct device *);
+ int (*add_opps_to_device)(struct device *);
int (*sensor_get_capability)(u16 *sensors);
int (*sensor_get_info)(u16 sensor_id, struct scpi_sensor_info *);
int (*sensor_get_value)(u16, u64 *);
diff --git a/include/linux/soc/renesas/rcar-rst.h b/include/linux/soc/renesas/rcar-rst.h
index 787e7ad53d45..2c231f2280a6 100644
--- a/include/linux/soc/renesas/rcar-rst.h
+++ b/include/linux/soc/renesas/rcar-rst.h
@@ -1,8 +1,7 @@
#ifndef __LINUX_SOC_RENESAS_RCAR_RST_H__
#define __LINUX_SOC_RENESAS_RCAR_RST_H__
-#if defined(CONFIG_ARCH_RCAR_GEN1) || defined(CONFIG_ARCH_RCAR_GEN2) || \
- defined(CONFIG_ARCH_R8A7795) || defined(CONFIG_ARCH_R8A7796)
+#ifdef CONFIG_RST_RCAR
int rcar_rst_read_mode_pins(u32 *mode);
#else
static inline int rcar_rst_read_mode_pins(u32 *mode) { return -ENODEV; }
diff --git a/include/soc/tegra/bpmp-abi.h b/include/soc/tegra/bpmp-abi.h
index 0aaef5960e29..98d8d38b99a1 100644
--- a/include/soc/tegra/bpmp-abi.h
+++ b/include/soc/tegra/bpmp-abi.h
@@ -81,13 +81,18 @@
* Provides the MRQ number for the MRQ message: #mrq. The remainder of
* the MRQ message is a payload (immediately following the
* mrq_request) whose format depends on mrq.
- *
- * @todo document the flags
*/
struct mrq_request {
/** @brief MRQ number of the request */
uint32_t mrq;
- /** @brief flags for the request */
+ /**
+ * @brief flags providing follow up directions to the receiver
+ *
+ * | Bit | Description |
+ * |-----|--------------------------------------------|
+ * | 1 | ring the sender's doorbell when responding |
+ * | 0 | should be 1 |
+ */
uint32_t flags;
} __ABI_PACKED;
@@ -99,13 +104,11 @@ struct mrq_request {
* remainder of the MRQ response is a payload (immediately following
* the mrq_response) whose format depends on the associated
* mrq_request::mrq
- *
- * @todo document the flags
*/
struct mrq_response {
/** @brief error code for the MRQ request itself */
int32_t err;
- /** @brief flags for the response */
+ /** @brief reserved for future use */
uint32_t flags;
} __ABI_PACKED;
@@ -147,6 +150,8 @@ struct mrq_response {
#define MRQ_ABI_RATCHET 29
#define MRQ_EMC_DVFS_LATENCY 31
#define MRQ_TRACE_ITER 64
+#define MRQ_RINGBUF_CONSOLE 65
+#define MRQ_PG 66
/** @} */
@@ -155,7 +160,7 @@ struct mrq_response {
* @brief Maximum MRQ code to be sent by CPU software to
* BPMP. Subject to change in future
*/
-#define MAX_CPU_MRQ_ID 64
+#define MAX_CPU_MRQ_ID 66
/**
* @addtogroup MRQ_Payloads Message Payloads
@@ -175,6 +180,7 @@ struct mrq_response {
* @defgroup Vhint CPU Voltage hint
* @defgroup MRQ_Deprecated Deprecated MRQ messages
* @defgroup EMC
+ * @defgroup RingbufConsole
* @}
*/
@@ -637,7 +643,7 @@ struct mrq_debugfs_response {
* * Initiators: Any
* * Targets: BPMP
* * Request Payload: @ref mrq_reset_request
- * * Response Payload: N/A
+ * * Response Payload: @ref mrq_reset_response
*/
/**
@@ -647,6 +653,7 @@ enum mrq_reset_commands {
CMD_RESET_ASSERT = 1,
CMD_RESET_DEASSERT = 2,
CMD_RESET_MODULE = 3,
+ CMD_RESET_GET_MAX_ID = 4,
CMD_RESET_MAX, /* not part of ABI and subject to change */
};
@@ -665,6 +672,38 @@ struct mrq_reset_request {
} __ABI_PACKED;
/**
+ * @ingroup Reset
+ * @brief Response for MRQ_RESET sub-command CMD_RESET_GET_MAX_ID. When
+ * this sub-command is not supported, firmware will return -BPMP_EBADCMD
+ * in mrq_response::err.
+ */
+struct cmd_reset_get_max_id_response {
+ /** @brief max reset id */
+ uint32_t max_id;
+} __ABI_PACKED;
+
+/**
+ * @ingroup Reset
+ * @brief Response with MRQ_RESET
+ *
+ * Each sub-command supported by @ref mrq_reset_request may return
+ * sub-command-specific data. Some do and some do not as indicated
+ * in the following table
+ *
+ * | sub-command | payload |
+ * |----------------------|------------------|
+ * | CMD_RESET_ASSERT | - |
+ * | CMD_RESET_DEASSERT | - |
+ * | CMD_RESET_MODULE | - |
+ * | CMD_RESET_GET_MAX_ID | reset_get_max_id |
+ */
+struct mrq_reset_response {
+ union {
+ struct cmd_reset_get_max_id_response reset_get_max_id;
+ } __UNION_ANON;
+} __ABI_PACKED;
+
+/**
* @ingroup MRQ_Codes
* @def MRQ_I2C
* @brief issue an i2c transaction
@@ -812,6 +851,17 @@ enum {
};
/** @} */
+/**
+ * @name MRQ_CLK properties
+ * Flag bits for cmd_clk_properties_response::flags and
+ * cmd_clk_get_all_info_response::flags
+ * @{
+ */
+#define BPMP_CLK_HAS_MUX (1 << 0)
+#define BPMP_CLK_HAS_SET_RATE (1 << 1)
+#define BPMP_CLK_IS_ROOT (1 << 2)
+/** @} */
+
#define MRQ_CLK_NAME_MAXLEN 40
#define MRQ_CLK_MAX_PARENTS 16
@@ -1010,7 +1060,7 @@ struct mrq_clk_response {
*
* * Platforms: All
* * Initiators: Any
- * * Targets: Any
+ * * Targets: Any except DMCE
* * Request Payload: @ref mrq_query_abi_request
* * Response Payload: @ref mrq_query_abi_response
*/
@@ -1030,6 +1080,9 @@ struct mrq_query_abi_request {
/**
* @ingroup ABI_info
* @brief response to MRQ_QUERY_ABI
+ *
+ * @note mrq_response::err of 0 indicates that the query was
+ * successful, not that the MRQ itself is supported!
*/
struct mrq_query_abi_response {
/** @brief 0 if queried MRQ is supported. Else, -#BPMP_ENODEV */
@@ -1080,7 +1133,9 @@ struct mrq_pg_read_state_response {
/**
* @ingroup MRQ_Codes
* @def MRQ_PG_UPDATE_STATE
- * @brief modify the power-gating state of a partition
+ * @brief modify the power-gating state of a partition. In contrast to
+ * MRQ_PG calls, the operations that change state (on/off) of power
+ * partition are reference counted.
*
* * Platforms: T186
* * Initiators: Any
@@ -1126,6 +1181,171 @@ struct mrq_pg_update_state_request {
/**
* @ingroup MRQ_Codes
+ * @def MRQ_PG
+ * @brief Control power-gating state of a partition. In contrast to
+ * MRQ_PG_UPDATE_STATE, operations that change the power partition
+ * state are NOT reference counted
+ *
+ * * Platforms: T186
+ * * Initiators: Any
+ * * Targets: BPMP
+ * * Request Payload: @ref mrq_pg_request
+ * * Response Payload: @ref mrq_pg_response
+ * @addtogroup Powergating
+ * @{
+ */
+
+/**
+ * @name MRQ_PG sub-commands
+ * @{
+ */
+enum mrq_pg_cmd {
+ /**
+ * @brief Check whether the BPMP driver supports the specified
+ * request type
+ *
+ * mrq_response::err is 0 if the specified request is
+ * supported and -#BPMP_ENODEV otherwise.
+ */
+ CMD_PG_QUERY_ABI = 0,
+
+ /**
+ * @brief Set the current state of specified power domain. The
+ * possible values for power domains are defined in enum
+ * pg_states
+ *
+ * mrq_response:err is
+ * 0: Success
+ * -#BPMP_EINVAL: Invalid request parameters
+ */
+ CMD_PG_SET_STATE = 1,
+
+ /**
+ * @brief Get the current state of specified power domain. The
+ * possible values for power domains are defined in enum
+ * pg_states
+ *
+ * mrq_response:err is
+ * 0: Success
+ * -#BPMP_EINVAL: Invalid request parameters
+ */
+ CMD_PG_GET_STATE = 2,
+
+ /**
+ * @brief get the name string of specified power domain id.
+ *
+ * mrq_response:err is
+ * 0: Success
+ * -#BPMP_EINVAL: Invalid request parameters
+ */
+ CMD_PG_GET_NAME = 3,
+
+
+ /**
+ * @brief get the highest power domain id in the system. Not
+ * all IDs between 0 and max_id are valid IDs.
+ *
+ * mrq_response:err is
+ * 0: Success
+ * -#BPMP_EINVAL: Invalid request parameters
+ */
+ CMD_PG_GET_MAX_ID = 4,
+};
+/** @} */
+
+#define MRQ_PG_NAME_MAXLEN 40
+
+/**
+ * @brief possible power domain states in
+ * cmd_pg_set_state_request:state and cmd_pg_get_state_response:state.
+ * PG_STATE_OFF: power domain is OFF
+ * PG_STATE_ON: power domain is ON
+ * PG_STATE_RUNNING: power domain is ON and made into directly usable
+ * state by turning on the clocks associated with
+ * the domain
+ */
+enum pg_states {
+ PG_STATE_OFF = 0,
+ PG_STATE_ON = 1,
+ PG_STATE_RUNNING = 2,
+};
+
+struct cmd_pg_query_abi_request {
+ uint32_t type; /* enum mrq_pg_cmd */
+} __ABI_PACKED;
+
+struct cmd_pg_set_state_request {
+ uint32_t state; /* enum pg_states */
+} __ABI_PACKED;
+
+struct cmd_pg_get_state_response {
+ uint32_t state; /* enum pg_states */
+} __ABI_PACKED;
+
+struct cmd_pg_get_name_response {
+ uint8_t name[MRQ_PG_NAME_MAXLEN];
+} __ABI_PACKED;
+
+struct cmd_pg_get_max_id_response {
+ uint32_t max_id;
+} __ABI_PACKED;
+
+/**
+ * @ingroup Powergating
+ * @brief request with #MRQ_PG
+ *
+ * Used by the sender of an #MRQ_PG message to control power
+ * partitions. The pg_request is split into several sub-commands. Some
+ * sub-commands require no additional data. Others have a sub-command
+ * specific payload
+ *
+ * |sub-command |payload |
+ * |----------------------------|-----------------------|
+ * |CMD_PG_QUERY_ABI | query_abi |
+ * |CMD_PG_SET_STATE | set_state |
+ * |CMD_PG_GET_STATE | - |
+ * |CMD_PG_GET_NAME | - |
+ * |CMD_PG_GET_MAX_ID | - |
+ *
+ */
+
+struct mrq_pg_request {
+ uint32_t cmd;
+ uint32_t id;
+ union {
+ struct cmd_pg_query_abi_request query_abi;
+ struct cmd_pg_set_state_request set_state;
+ } __UNION_ANON;
+} __ABI_PACKED;
+
+/**
+ * @ingroup Powergating
+ * @brief response to MRQ_PG
+ *
+ * Each sub-command supported by @ref mrq_pg_request may return
+ * sub-command-specific data. Some do and some do not as indicated in
+ * the following table
+ *
+ * |sub-command |payload |
+ * |----------------------------|-----------------------|
+ * |CMD_PG_QUERY_ABI | - |
+ * |CMD_PG_SET_STATE | - |
+ * |CMD_PG_GET_STATE | get_state |
+ * |CMD_PG_GET_NAME | get_name |
+ * |CMD_PG_GET_MAX_ID | get_max_id |
+ *
+ */
+
+struct mrq_pg_response {
+ union {
+ struct cmd_pg_get_state_response get_state;
+ struct cmd_pg_get_name_response get_name;
+ struct cmd_pg_get_max_id_response get_max_id;
+ } __UNION_ANON;
+} __ABI_PACKED;
+
+/**
+ * @ingroup MRQ_Codes
* @def MRQ_THERMAL
* @brief interact with BPMP thermal framework
*
@@ -1529,6 +1749,184 @@ struct mrq_trace_iter_request {
/** @} */
+/**
+ * @ingroup MRQ_Codes
+ * @def MRQ_RINGBUF_CONSOLE
+ * @brief A ring buffer debug console for BPMP
+ * @addtogroup RingbufConsole
+ *
+ * The ring buffer debug console aims to be a substitute for the UART debug
+ * console. The debug console is implemented with two ring buffers in the
+ * BPMP-FW, the RX (receive) and TX (transmit) buffers. Characters can be read
+ * and written to the buffers by the host via the MRQ interface.
+ *
+ * @{
+ */
+
+/**
+ * @brief Maximum number of bytes transferred in a single write command to the
+ * BPMP
+ *
+ * This is determined by the number of free bytes in the message struct,
+ * rounded down to a multiple of four.
+ */
+#define MRQ_RINGBUF_CONSOLE_MAX_WRITE_LEN 112
+
+/**
+ * @brief Maximum number of bytes transferred in a single read command to the
+ * BPMP
+ *
+ * This is determined by the number of free bytes in the message struct,
+ * rounded down to a multiple of four.
+ */
+#define MRQ_RINGBUF_CONSOLE_MAX_READ_LEN 116
+
+enum mrq_ringbuf_console_host_to_bpmp_cmd {
+ /**
+ * @brief Check whether the BPMP driver supports the specified request
+ * type
+ *
+ * mrq_response::err is 0 if the specified request is supported and
+ * -#BPMP_ENODEV otherwise
+ */
+ CMD_RINGBUF_CONSOLE_QUERY_ABI = 0,
+ /**
+ * @brief Perform a read operation on the BPMP TX buffer
+ *
+ * mrq_response::err is 0
+ */
+ CMD_RINGBUF_CONSOLE_READ = 1,
+ /**
+ * @brief Perform a write operation on the BPMP RX buffer
+ *
+ * mrq_response::err is 0 if the operation was successful and
+ * -#BPMP_ENODEV otherwise
+ */
+ CMD_RINGBUF_CONSOLE_WRITE = 2,
+ /**
+ * @brief Get the length of the buffer and the physical addresses of
+ * the buffer data and the head and tail counters
+ *
+ * mrq_response::err is 0 if the operation was successful and
+ * -#BPMP_ENODEV otherwise
+ */
+ CMD_RINGBUF_CONSOLE_GET_FIFO = 3,
+};
+
+/**
+ * @ingroup RingbufConsole
+ * @brief Host->BPMP request data for request type
+ * #CMD_RINGBUF_CONSOLE_QUERY_ABI
+ */
+struct cmd_ringbuf_console_query_abi_req {
+ /** @brief Command identifier to be queried */
+ uint32_t cmd;
+} __ABI_PACKED;
+
+/** @private */
+struct cmd_ringbuf_console_query_abi_resp {
+ EMPTY
+} __ABI_PACKED;
+
+/**
+ * @ingroup RingbufConsole
+ * @brief Host->BPMP request data for request type #CMD_RINGBUF_CONSOLE_READ
+ */
+struct cmd_ringbuf_console_read_req {
+ /**
+ * @brief Number of bytes requested to be read from the BPMP TX buffer
+ */
+ uint8_t len;
+} __ABI_PACKED;
+
+/**
+ * @ingroup RingbufConsole
+ * @brief BPMP->Host response data for request type #CMD_RINGBUF_CONSOLE_READ
+ */
+struct cmd_ringbuf_console_read_resp {
+ /** @brief The actual data read from the BPMP TX buffer */
+ uint8_t data[MRQ_RINGBUF_CONSOLE_MAX_READ_LEN];
+ /** @brief Number of bytes in cmd_ringbuf_console_read_resp::data */
+ uint8_t len;
+} __ABI_PACKED;
+
+/**
+ * @ingroup RingbufConsole
+ * @brief Host->BPMP request data for request type #CMD_RINGBUF_CONSOLE_WRITE
+ */
+struct cmd_ringbuf_console_write_req {
+ /** @brief The actual data to be written to the BPMP RX buffer */
+ uint8_t data[MRQ_RINGBUF_CONSOLE_MAX_WRITE_LEN];
+ /** @brief Number of bytes in cmd_ringbuf_console_write_req::data */
+ uint8_t len;
+} __ABI_PACKED;
+
+/**
+ * @ingroup RingbufConsole
+ * @brief BPMP->Host response data for request type #CMD_RINGBUF_CONSOLE_WRITE
+ */
+struct cmd_ringbuf_console_write_resp {
+ /** @brief Number of bytes of available space in the BPMP RX buffer */
+ uint32_t space_avail;
+ /** @brief Number of bytes that were written to the BPMP RX buffer */
+ uint8_t len;
+} __ABI_PACKED;
+
+/** @private */
+struct cmd_ringbuf_console_get_fifo_req {
+ EMPTY
+} __ABI_PACKED;
+
+/**
+ * @ingroup RingbufConsole
+ * @brief BPMP->Host reply data for request type #CMD_RINGBUF_CONSOLE_GET_FIFO
+ */
+struct cmd_ringbuf_console_get_fifo_resp {
+ /** @brief Physical address of the BPMP TX buffer */
+ uint64_t bpmp_tx_buf_addr;
+ /** @brief Physical address of the BPMP TX buffer head counter */
+ uint64_t bpmp_tx_head_addr;
+ /** @brief Physical address of the BPMP TX buffer tail counter */
+ uint64_t bpmp_tx_tail_addr;
+ /** @brief Length of the BPMP TX buffer */
+ uint32_t bpmp_tx_buf_len;
+} __ABI_PACKED;
+
+/**
+ * @ingroup RingbufConsole
+ * @brief Host->BPMP request data.
+ *
+ * Reply type is union #mrq_ringbuf_console_bpmp_to_host_response .
+ */
+struct mrq_ringbuf_console_host_to_bpmp_request {
+ /**
+ * @brief type of request. Values listed in enum
+ * #mrq_ringbuf_console_host_to_bpmp_cmd.
+ */
+ uint32_t type;
+ /** @brief request type specific parameters. */
+ union {
+ struct cmd_ringbuf_console_query_abi_req query_abi;
+ struct cmd_ringbuf_console_read_req read;
+ struct cmd_ringbuf_console_write_req write;
+ struct cmd_ringbuf_console_get_fifo_req get_fifo;
+ } __UNION_ANON;
+} __ABI_PACKED;
+
+/**
+ * @ingroup RingbufConsole
+ * @brief Host->BPMP reply data
+ *
+ * In response to struct #mrq_ringbuf_console_host_to_bpmp_request.
+ */
+union mrq_ringbuf_console_bpmp_to_host_response {
+ struct cmd_ringbuf_console_query_abi_resp query_abi;
+ struct cmd_ringbuf_console_read_resp read;
+ struct cmd_ringbuf_console_write_resp write;
+ struct cmd_ringbuf_console_get_fifo_resp get_fifo;
+} __ABI_PACKED;
+/** @} */
+
/*
* 4. Enumerations
*/
diff --git a/include/soc/tegra/bpmp.h b/include/soc/tegra/bpmp.h
index 13dcd44e91bb..9ba65222bd3f 100644
--- a/include/soc/tegra/bpmp.h
+++ b/include/soc/tegra/bpmp.h
@@ -15,6 +15,7 @@
#define __SOC_TEGRA_BPMP_H
#include <linux/mailbox_client.h>
+#include <linux/pm_domain.h>
#include <linux/reset-controller.h>
#include <linux/semaphore.h>
#include <linux/types.h>
@@ -91,6 +92,8 @@ struct tegra_bpmp {
unsigned int num_clocks;
struct reset_controller_dev rstc;
+
+ struct genpd_onecell_data genpd;
};
struct tegra_bpmp *tegra_bpmp_get(struct device *dev);
@@ -138,4 +141,13 @@ static inline int tegra_bpmp_init_resets(struct tegra_bpmp *bpmp)
}
#endif
+#if IS_ENABLED(CONFIG_SOC_TEGRA_POWERGATE_BPMP)
+int tegra_bpmp_init_powergates(struct tegra_bpmp *bpmp);
+#else
+static inline int tegra_bpmp_init_powergates(struct tegra_bpmp *bpmp)
+{
+ return 0;
+}
+#endif
+
#endif /* __SOC_TEGRA_BPMP_H */