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author | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-20 09:13:34 -0700 |
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committer | Linus Torvalds <torvalds@linux-foundation.org> | 2008-10-20 09:13:34 -0700 |
commit | ed402af3c23a4804b3f8899263e8d0f97c62ab49 (patch) | |
tree | 3aa971aea57f900a3060cc0545b199ef611f4dcf /include | |
parent | 096e6f673dc02a6394dc9a7d8f8735c6978f5b91 (diff) | |
parent | 40e24c403f325715f9c43b9fed2068641201ee0b (diff) | |
download | linux-ed402af3c23a4804b3f8899263e8d0f97c62ab49.tar.bz2 |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/lethal/sh-2.6: (112 commits)
sh: Move SH-4 CPU headers down one more level.
sh: Only build in gpio.o when CONFIG_GENERIC_GPIO is selected.
sh: Migrate common board headers to mach-common/.
sh: Move the CPU definition headers from asm/ to cpu/.
serial: sh-sci: Add support SCIF of SH7723
video: add sh_mobile_lcdc platform flags
video: remove unused sh_mobile_lcdc platform data
sh: remove consistent alloc cruft
sh: add dynamic crash base address support
sh: reduce Migo-R smc91x overruns
sh: Fix up some merge damage.
Fix debugfs_create_file's error checking method for arch/sh/mm/
Fix debugfs_create_dir's error checking method for arch/sh/kernel/
sh: ap325rxa: Add support RTC RX-8564LC in AP325RXA board
sh: Use sh7720 GPIO on magicpanelr2 board
sh: Add sh7720 pinmux code
sh: Use sh7203 GPIO on rsk7203 board
sh: Add sh7203 pinmux code
sh: Use sh7723 GPIO on AP325RXA board
sh: Add sh7723 pinmux code
...
Diffstat (limited to 'include')
-rw-r--r-- | include/linux/sh_intc.h | 91 | ||||
-rw-r--r-- | include/video/sh_mobile_lcdc.h | 78 |
2 files changed, 169 insertions, 0 deletions
diff --git a/include/linux/sh_intc.h b/include/linux/sh_intc.h new file mode 100644 index 000000000000..68e212ff9dde --- /dev/null +++ b/include/linux/sh_intc.h @@ -0,0 +1,91 @@ +#ifndef __SH_INTC_H +#define __SH_INTC_H + +typedef unsigned char intc_enum; + +struct intc_vect { + intc_enum enum_id; + unsigned short vect; +}; + +#define INTC_VECT(enum_id, vect) { enum_id, vect } +#define INTC_IRQ(enum_id, irq) INTC_VECT(enum_id, irq2evt(irq)) + +struct intc_group { + intc_enum enum_id; + intc_enum enum_ids[32]; +}; + +#define INTC_GROUP(enum_id, ids...) { enum_id, { ids } } + +struct intc_mask_reg { + unsigned long set_reg, clr_reg, reg_width; + intc_enum enum_ids[32]; +#ifdef CONFIG_SMP + unsigned long smp; +#endif +}; + +struct intc_prio_reg { + unsigned long set_reg, clr_reg, reg_width, field_width; + intc_enum enum_ids[16]; +#ifdef CONFIG_SMP + unsigned long smp; +#endif +}; + +struct intc_sense_reg { + unsigned long reg, reg_width, field_width; + intc_enum enum_ids[16]; +}; + +#ifdef CONFIG_SMP +#define INTC_SMP(stride, nr) .smp = (stride) | ((nr) << 8) +#else +#define INTC_SMP(stride, nr) +#endif + +struct intc_desc { + struct intc_vect *vectors; + unsigned int nr_vectors; + struct intc_group *groups; + unsigned int nr_groups; + struct intc_mask_reg *mask_regs; + unsigned int nr_mask_regs; + struct intc_prio_reg *prio_regs; + unsigned int nr_prio_regs; + struct intc_sense_reg *sense_regs; + unsigned int nr_sense_regs; + char *name; +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) + struct intc_mask_reg *ack_regs; + unsigned int nr_ack_regs; +#endif +}; + +#define _INTC_ARRAY(a) a, sizeof(a)/sizeof(*a) +#define DECLARE_INTC_DESC(symbol, chipname, vectors, groups, \ + mask_regs, prio_regs, sense_regs) \ +struct intc_desc symbol __initdata = { \ + _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ + _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ + _INTC_ARRAY(sense_regs), \ + chipname, \ +} + +#if defined(CONFIG_CPU_SH3) || defined(CONFIG_CPU_SH4A) +#define DECLARE_INTC_DESC_ACK(symbol, chipname, vectors, groups, \ + mask_regs, prio_regs, sense_regs, ack_regs) \ +struct intc_desc symbol __initdata = { \ + _INTC_ARRAY(vectors), _INTC_ARRAY(groups), \ + _INTC_ARRAY(mask_regs), _INTC_ARRAY(prio_regs), \ + _INTC_ARRAY(sense_regs), \ + chipname, \ + _INTC_ARRAY(ack_regs), \ +} +#endif + +void __init register_intc_controller(struct intc_desc *desc); +int intc_set_priority(unsigned int irq, unsigned int prio); + +#endif /* __SH_INTC_H */ diff --git a/include/video/sh_mobile_lcdc.h b/include/video/sh_mobile_lcdc.h new file mode 100644 index 000000000000..1a4bc6ada606 --- /dev/null +++ b/include/video/sh_mobile_lcdc.h @@ -0,0 +1,78 @@ +#ifndef __ASM_SH_MOBILE_LCDC_H__ +#define __ASM_SH_MOBILE_LCDC_H__ + +#include <linux/fb.h> + +enum { RGB8, /* 24bpp, 8:8:8 */ + RGB9, /* 18bpp, 9:9 */ + RGB12A, /* 24bpp, 12:12 */ + RGB12B, /* 12bpp */ + RGB16, /* 16bpp */ + RGB18, /* 18bpp */ + RGB24, /* 24bpp */ + SYS8A, /* 24bpp, 8:8:8 */ + SYS8B, /* 18bpp, 8:8:2 */ + SYS8C, /* 18bpp, 2:8:8 */ + SYS8D, /* 16bpp, 8:8 */ + SYS9, /* 18bpp, 9:9 */ + SYS12, /* 24bpp, 12:12 */ + SYS16A, /* 16bpp */ + SYS16B, /* 18bpp, 16:2 */ + SYS16C, /* 18bpp, 2:16 */ + SYS18, /* 18bpp */ + SYS24 };/* 24bpp */ + +enum { LCDC_CHAN_DISABLED = 0, + LCDC_CHAN_MAINLCD, + LCDC_CHAN_SUBLCD }; + +enum { LCDC_CLK_BUS, LCDC_CLK_PERIPHERAL, LCDC_CLK_EXTERNAL }; + +#define LCDC_FLAGS_DWPOL (1 << 0) /* Rising edge dot clock data latch */ +#define LCDC_FLAGS_DIPOL (1 << 1) /* Active low display enable polarity */ +#define LCDC_FLAGS_DAPOL (1 << 2) /* Active low display data polarity */ +#define LCDC_FLAGS_HSCNT (1 << 3) /* Disable HSYNC during VBLANK */ +#define LCDC_FLAGS_DWCNT (1 << 4) /* Disable dotclock during blanking */ + +struct sh_mobile_lcdc_sys_bus_cfg { + unsigned long ldmt2r; + unsigned long ldmt3r; +}; + +struct sh_mobile_lcdc_sys_bus_ops { + void (*write_index)(void *handle, unsigned long data); + void (*write_data)(void *handle, unsigned long data); + unsigned long (*read_data)(void *handle); +}; + +struct sh_mobile_lcdc_board_cfg { + void *board_data; + int (*setup_sys)(void *board_data, void *sys_ops_handle, + struct sh_mobile_lcdc_sys_bus_ops *sys_ops); + void (*display_on)(void *board_data); + void (*display_off)(void *board_data); +}; + +struct sh_mobile_lcdc_lcd_size_cfg { /* width and height of panel in mm */ + unsigned long width; + unsigned long height; +}; + +struct sh_mobile_lcdc_chan_cfg { + int chan; + int bpp; + int interface_type; /* selects RGBn or SYSn I/F, see above */ + int clock_divider; + unsigned long flags; /* LCDC_FLAGS_... */ + struct fb_videomode lcd_cfg; + struct sh_mobile_lcdc_lcd_size_cfg lcd_size_cfg; + struct sh_mobile_lcdc_board_cfg board_cfg; + struct sh_mobile_lcdc_sys_bus_cfg sys_bus_cfg; /* only for SYSn I/F */ +}; + +struct sh_mobile_lcdc_info { + int clock_source; + struct sh_mobile_lcdc_chan_cfg ch[2]; +}; + +#endif /* __ASM_SH_MOBILE_LCDC_H__ */ |