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authorDave Airlie <airlied@redhat.com>2014-02-27 14:39:30 +1000
committerDave Airlie <airlied@redhat.com>2014-02-27 14:39:30 +1000
commit4d538b79197901fecc42e746d515d07fd1089b62 (patch)
tree0551acabf260fcd7c0189a4e06bb608e31d1206e /include/uapi/drm
parentc48cdd23ea5006c377b670bc3056fa7b63f92574 (diff)
parent82dc62a31ce3ed7b4eeea9c65a3b69e81e2ea688 (diff)
downloadlinux-4d538b79197901fecc42e746d515d07fd1089b62.tar.bz2
Merge branch 'drm-next-3.15' of git://people.freedesktop.org/~deathsimple/linux into drm-next
So this is the initial pull request for radeon drm-next 3.15. Highlights: - VCE bringup including DPM support - Few cleanups for the ring handling code * 'drm-next-3.15' of git://people.freedesktop.org/~deathsimple/linux: drm/radeon: cleanup false positive lockup handling drm/radeon: drop radeon_ring_force_activity drm/radeon: drop drivers copy of the rptr drm/radeon/cik: enable/disable vce cg when encoding v2 drm/radeon: add support for vce 2.0 clock gating drm/radeon/dpm: properly enable/disable vce when vce pg is enabled drm/radeon/dpm: enable dynamic vce state switching v2 drm/radeon: add vce dpm support for KV/KB drm/radeon: enable vce dpm on CI drm/radeon: add vce dpm support for CI drm/radeon: fill in set_vce_clocks for CIK asics drm/radeon/dpm: fetch vce states from the vbios drm/radeon/dpm: fill in some initial vce infrastructure drm/radeon/dpm: move platform caps fetching to a separate function drm/radeon: add callback for setting vce clocks drm/radeon: add VCE version parsing and checking drm/radeon: add VCE ring query drm/radeon: initial VCE support v4 drm/radeon: fix CP semaphores on CIK
Diffstat (limited to 'include/uapi/drm')
-rw-r--r--include/uapi/drm/radeon_drm.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/include/uapi/drm/radeon_drm.h b/include/uapi/drm/radeon_drm.h
index d9ea3a73afe2..1cf18b4a39ec 100644
--- a/include/uapi/drm/radeon_drm.h
+++ b/include/uapi/drm/radeon_drm.h
@@ -919,6 +919,7 @@ struct drm_radeon_gem_va {
#define RADEON_CS_RING_COMPUTE 1
#define RADEON_CS_RING_DMA 2
#define RADEON_CS_RING_UVD 3
+#define RADEON_CS_RING_VCE 4
/* The third dword of RADEON_CHUNK_ID_FLAGS is a sint32 that sets the priority */
/* 0 = normal, + = higher priority, - = lower priority */
@@ -987,6 +988,10 @@ struct drm_radeon_cs {
#define RADEON_INFO_SI_BACKEND_ENABLED_MASK 0x19
/* max engine clock - needed for OpenCL */
#define RADEON_INFO_MAX_SCLK 0x1a
+/* version of VCE firmware */
+#define RADEON_INFO_VCE_FW_VERSION 0x1b
+/* version of VCE feedback */
+#define RADEON_INFO_VCE_FB_VERSION 0x1c
struct drm_radeon_info {