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| author | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2020-12-01 13:17:57 +0000 |
|---|---|---|
| committer | Tvrtko Ursulin <tvrtko.ursulin@intel.com> | 2020-12-02 12:18:13 +0000 |
| commit | 348fb0cb0a79bce03f402d689bbe0bf666577531 (patch) | |
| tree | 79d8b5d639510cb68771d8c19b90e690ae747748 /include/uapi/drm/i915_drm.h | |
| parent | 37df0edf7048f4128953e18ffc9a6b84cf15f4cd (diff) | |
| download | linux-348fb0cb0a79bce03f402d689bbe0bf666577531.tar.bz2 | |
drm/i915/pmu: Deprecate I915_PMU_LAST and optimize state tracking
Adding any kinds of "last" abi markers is usually a mistake which I
repeated when implementing the PMU because it felt convenient at the time.
This patch marks I915_PMU_LAST as deprecated and stops the internal
implementation using it for sizing the event status bitmask and array.
New way of sizing the fields is a bit less elegant, but it omits reserving
slots for tracking events we are not interested in, and as such saves some
runtime space. Adding sampling events is likely to be a special event and
the new plumbing needed will be easily detected in testing. Existing
asserts against the bitfield and array sizes are keeping the code safe.
First event which gets the new treatment in this new scheme are the
interrupts - which neither needs any tracking in i915 pmu nor needs
waking up the GPU to read it.
v2:
* Streamline helper names. (Chris)
v3:
* Comment which events need tracking. (Chris)
Signed-off-by: Tvrtko Ursulin <tvrtko.ursulin@intel.com>
Cc: Chris Wilson <chris@chris-wilson.co.uk>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20201201131757.206367-1-tvrtko.ursulin@linux.intel.com
Diffstat (limited to 'include/uapi/drm/i915_drm.h')
| -rw-r--r-- | include/uapi/drm/i915_drm.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/uapi/drm/i915_drm.h b/include/uapi/drm/i915_drm.h index fa1f3d62f9a6..6edcb2b6c708 100644 --- a/include/uapi/drm/i915_drm.h +++ b/include/uapi/drm/i915_drm.h @@ -178,7 +178,7 @@ enum drm_i915_pmu_engine_sample { #define I915_PMU_INTERRUPTS __I915_PMU_OTHER(2) #define I915_PMU_RC6_RESIDENCY __I915_PMU_OTHER(3) -#define I915_PMU_LAST I915_PMU_RC6_RESIDENCY +#define I915_PMU_LAST /* Deprecated - do not use */ I915_PMU_RC6_RESIDENCY /* Each region is a minimum of 16k, and there are at most 255 of them. */ |