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| author | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2013-02-11 11:06:33 +0000 |
|---|---|---|
| committer | Mark Brown <broonie@opensource.wolfsonmicro.com> | 2013-02-11 11:06:33 +0000 |
| commit | e790245eb3b437bb1d322cf3d5fbb603a138c9f7 (patch) | |
| tree | 54469e8ec666cb4a03b541c218482f172b80bb24 /include/sound | |
| parent | d289323286d6b4e738458c31533da51d294d28a0 (diff) | |
| parent | fd23fb9f6bfd43a6e62b2646d18d5ca3edc3ebe3 (diff) | |
| download | linux-e790245eb3b437bb1d322cf3d5fbb603a138c9f7.tar.bz2 | |
Merge remote-tracking branch 'asoc/topic/cs4271' into asoc-next
Diffstat (limited to 'include/sound')
| -rw-r--r-- | include/sound/cs4271.h | 15 |
1 files changed, 15 insertions, 0 deletions
diff --git a/include/sound/cs4271.h b/include/sound/cs4271.h index dd8c48d14ed9..70f45355acaa 100644 --- a/include/sound/cs4271.h +++ b/include/sound/cs4271.h @@ -20,6 +20,21 @@ struct cs4271_platform_data { int gpio_nreset; /* GPIO driving Reset pin, if any */ bool amutec_eq_bmutec; /* flag to enable AMUTEC=BMUTEC */ + + /* + * The CS4271 requires its LRCLK and MCLK to be stable before its RESET + * line is de-asserted. That also means that clocks cannot be changed + * without putting the chip back into hardware reset, which also requires + * a complete re-initialization of all registers. + * + * One (undocumented) workaround is to assert and de-assert the PDN bit + * in the MODE2 register. This workaround can be enabled with the + * following flag. + * + * Note that this is not needed in case the clocks are stable + * throughout the entire runtime of the codec. + */ + bool enable_soft_reset; }; #endif /* __CS4271_H */ |