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author | Changbin Du <changbin.du@intel.com> | 2017-06-06 15:56:09 +0800 |
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committer | Zhenyu Wang <zhenyuw@linux.intel.com> | 2017-06-08 13:59:19 +0800 |
commit | 65f9f6febf12ed5bbcebd3599698eb78b03e5b69 (patch) | |
tree | a9f1d792175a49ecd7808a309a4de4ac8a87764b /include/media/v4l2-device.h | |
parent | af2c6399aabeb7a7107657a469cb2f16b55dfbae (diff) | |
download | linux-65f9f6febf12ed5bbcebd3599698eb78b03e5b69.tar.bz2 |
drm/i915/gvt: Optimize MMIO register handling for some large MMIO blocks
Some of traced MMIO registers are a large continuous section. These
stuffed the MMIO lookup hash table and so waste lots of memory and
get much lower lookup performance.
Here we picked out these sections by special handling. These sections
include:
o Display pipe registers, total 768.
o The PVINFO page, total 1024.
o MCHBAR_MIRROR, total 65536.
o CSR_MMIO, total 3072.
So we removed 70,400 items from the hash table, and speed up guest
boot time by ~500ms.
v2:
o add a local function find_mmio_block().
o fix comments.
Signed-off-by: Changbin Du <changbin.du@intel.com>
Signed-off-by: Zhenyu Wang <zhenyuw@linux.intel.com>
Diffstat (limited to 'include/media/v4l2-device.h')
0 files changed, 0 insertions, 0 deletions