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authorMichael Turquette <mturquette@baylibre.com>2017-04-12 18:51:43 +0200
committerMichael Turquette <mturquette@baylibre.com>2017-04-12 18:51:43 +0200
commit0d7a5328dba0d3e299d7d611e4ec059b8cab4f38 (patch)
treeb71591a6d3ee0d040b87f95366f5a3aaeec9270e /include/dt-bindings
parent17c34c566795ca7529cf888fb33fdb7997d6b202 (diff)
parent3a429818a2e48928ae0114df5fb3b0612dd57001 (diff)
downloadlinux-0d7a5328dba0d3e299d7d611e4ec059b8cab4f38.tar.bz2
Merge tag 'amlogic-clk' of git://git.kernel.org/pub/scm/linux/kernel/git/khilman/linux-amlogic into clk-next
Same great taste as the previous pull request, but now with 50% less DT bikeshedding! Amlogic clock driver updates for v4.12 - meson8: add some new PLLs - new clocks for Mali - misc fixes.
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/gxbb-clkc.h11
1 files changed, 11 insertions, 0 deletions
diff --git a/include/dt-bindings/clock/gxbb-clkc.h b/include/dt-bindings/clock/gxbb-clkc.h
index 692846c7941b..cce6cb5418f1 100644
--- a/include/dt-bindings/clock/gxbb-clkc.h
+++ b/include/dt-bindings/clock/gxbb-clkc.h
@@ -10,12 +10,17 @@
#define CLKID_FCLK_DIV2 4
#define CLKID_FCLK_DIV3 5
#define CLKID_FCLK_DIV4 6
+#define CLKID_GP0_PLL 9
#define CLKID_CLK81 12
#define CLKID_MPLL2 15
#define CLKID_SPI 34
#define CLKID_I2C 22
#define CLKID_SAR_ADC 23
#define CLKID_ETH 36
+#define CLKID_AIU_GLUE 38
+#define CLKID_I2S_OUT 40
+#define CLKID_MIXER_IFACE 44
+#define CLKID_AIU 47
#define CLKID_USB0 50
#define CLKID_USB1 51
#define CLKID_USB 55
@@ -24,11 +29,17 @@
#define CLKID_USB0_DDR_BRIDGE 65
#define CLKID_SANA 69
#define CLKID_GCLK_VENCI_INT0 77
+#define CLKID_AOCLK_GATE 80
#define CLKID_AO_I2C 93
#define CLKID_SD_EMMC_A 94
#define CLKID_SD_EMMC_B 95
#define CLKID_SD_EMMC_C 96
#define CLKID_SAR_ADC_CLK 97
#define CLKID_SAR_ADC_SEL 98
+#define CLKID_MALI_0_SEL 100
+#define CLKID_MALI_0 102
+#define CLKID_MALI_1_SEL 103
+#define CLKID_MALI_1 105
+#define CLKID_MALI 106
#endif /* __GXBB_CLKC_H */