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authorKrzysztof Kozlowski <krzk@kernel.org>2017-01-31 21:36:52 +0200
committerKrzysztof Kozlowski <krzk@kernel.org>2017-01-31 21:36:52 +0200
commit67707c78f592590c83604d37e709f2e5218a5ac0 (patch)
tree10c6d9c1a0005697f637b853d68b5591198ac5c5 /include/dt-bindings
parent7547162ac351483df3641f64e99e10be329dd6a2 (diff)
parent698e0d1d22346ef03d7a13fcd9c2cc86a24bf317 (diff)
downloadlinux-67707c78f592590c83604d37e709f2e5218a5ac0.tar.bz2
Merge tag 'clk-v4.11-samsung-dphy' of git://linuxtv.org/snawrocki/samsung into next/dt64
Exporting clocks for MIPI DSI DPHY and the display PLL frequency list update for Exynos5433 SoC.
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/clock/exynos5433.h5
1 files changed, 4 insertions, 1 deletions
diff --git a/include/dt-bindings/clock/exynos5433.h b/include/dt-bindings/clock/exynos5433.h
index 4fa6bb2136e3..be39d23e6a32 100644
--- a/include/dt-bindings/clock/exynos5433.h
+++ b/include/dt-bindings/clock/exynos5433.h
@@ -771,7 +771,10 @@
#define CLK_PCLK_DECON 113
-#define DISP_NR_CLK 114
+#define CLK_PHYCLK_MIPIDPHY0_BITCLKDIV8_PHY 114
+#define CLK_PHYCLK_MIPIDPHY0_RXCLKESC0_PHY 115
+
+#define DISP_NR_CLK 116
/* CMU_AUD */
#define CLK_MOUT_AUD_PLL_USER 1