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authorLinus Torvalds <torvalds@linux-foundation.org>2016-05-19 12:50:56 -0700
committerLinus Torvalds <torvalds@linux-foundation.org>2016-05-19 12:50:56 -0700
commita37571a29eca963562ff5a9233db4a5c73c72cf9 (patch)
treeec78d4b5b905f32bc541b2faa5b89f88967cf990 /include/dt-bindings
parenta0d3c7c5c07cfbe00ab89438ddf82482f5a99422 (diff)
parent0d5358330c20d50e52e3e65ff07a5db8007041fc (diff)
downloadlinux-a37571a29eca963562ff5a9233db4a5c73c72cf9.tar.bz2
Merge tag 'pinctrl-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl
Pull pin control updates from Linus Walleij: "This kernel cycle was quite calm when it comes to pin control and there is really just one major change, and that is the introduction of devm_pinctrl_register() managed resources. Apart from that linear development, details below. Core changes: - Add the devm_pinctrl_register() API and switch all applicable drivers to use it, saving lots of lines of code all over the place. New drivers: - driver for the Broadcom NS2 SoC - subdriver for the PXA25x SoCs - subdriver for the AMLogic Meson GXBB SoC Driver improvements: - the Intel Baytrail driver now properly supports pin control - Nomadik, Rockchip, Broadcom BCM2835 support the .get_direction() callback in the GPIO portions - continued development and stabilization of several SH-PFC SoC subdrivers: r8a7795, r8a7790, r8a7794 etc" * tag 'pinctrl-v4.7-1' of git://git.kernel.org/pub/scm/linux/kernel/git/linusw/linux-pinctrl: (85 commits) Revert "pinctrl: tegra: avoid parked_reg and parked_bank" pinctrl: meson: Fix eth_tx_en bit index pinctrl: tegra: avoid parked_reg and parked_bank pinctrl: tegra: Correctly check the supported configuration pinctrl: amlogic: Add support for Amlogic Meson GXBB SoC pinctrl: rockchip: fix pull setting error for rk3399 pinctrl: stm32: Implement .pin_config_dbg_show() pinctrl: nomadik: hide nmk_gpio_get_mode when unused pinctrl: ns2: rename pinctrl_utils_dt_free_map pinctrl: at91: Merge clk_prepare and clk_enable into clk_prepare_enable pinctrl: at91: Make at91_gpio_template const pinctrl: baytrail: fix some error handling in debugfs pinctrl: ns2: add pinmux driver support for Broadcom NS2 SoC pinctrl: sirf/atlas7: trivial fix of spelling mistake on flagged pinctrl: sh-pfc: Kill unused variable in sh_pfc_remove() pinctrl: nomadik: implement .get_direction() pinctrl: nomadik: use BIT() with offsets consequently pinctrl: exynos5440: Use off-stack memory for pinctrl_gpio_range pinctrl: zynq: Use devm_pinctrl_register() for pinctrl registration pinctrl: u300: Use devm_pinctrl_register() for pinctrl registration ...
Diffstat (limited to 'include/dt-bindings')
-rw-r--r--include/dt-bindings/gpio/meson-gxbb-gpio.h154
1 files changed, 154 insertions, 0 deletions
diff --git a/include/dt-bindings/gpio/meson-gxbb-gpio.h b/include/dt-bindings/gpio/meson-gxbb-gpio.h
new file mode 100644
index 000000000000..58654fd7aa1e
--- /dev/null
+++ b/include/dt-bindings/gpio/meson-gxbb-gpio.h
@@ -0,0 +1,154 @@
+/*
+ * GPIO definitions for Amlogic Meson GXBB SoCs
+ *
+ * Copyright (C) 2016 Endless Mobile, Inc.
+ * Author: Carlo Caione <carlo@endlessm.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program. If not, see <http://www.gnu.org/licenses/>.
+ */
+
+#ifndef _DT_BINDINGS_MESON_GXBB_GPIO_H
+#define _DT_BINDINGS_MESON_GXBB_GPIO_H
+
+#define GPIOAO_0 0
+#define GPIOAO_1 1
+#define GPIOAO_2 2
+#define GPIOAO_3 3
+#define GPIOAO_4 4
+#define GPIOAO_5 5
+#define GPIOAO_6 6
+#define GPIOAO_7 7
+#define GPIOAO_8 8
+#define GPIOAO_9 9
+#define GPIOAO_10 10
+#define GPIOAO_11 11
+#define GPIOAO_12 12
+#define GPIOAO_13 13
+
+#define GPIOZ_0 0
+#define GPIOZ_1 1
+#define GPIOZ_2 2
+#define GPIOZ_3 3
+#define GPIOZ_4 4
+#define GPIOZ_5 5
+#define GPIOZ_6 6
+#define GPIOZ_7 7
+#define GPIOZ_8 8
+#define GPIOZ_9 9
+#define GPIOZ_10 10
+#define GPIOZ_11 11
+#define GPIOZ_12 12
+#define GPIOZ_13 13
+#define GPIOZ_14 14
+#define GPIOZ_15 15
+#define GPIOH_0 16
+#define GPIOH_1 17
+#define GPIOH_2 18
+#define GPIOH_3 19
+#define BOOT_0 20
+#define BOOT_1 21
+#define BOOT_2 22
+#define BOOT_3 23
+#define BOOT_4 24
+#define BOOT_5 25
+#define BOOT_6 26
+#define BOOT_7 27
+#define BOOT_8 28
+#define BOOT_9 29
+#define BOOT_10 30
+#define BOOT_11 31
+#define BOOT_12 32
+#define BOOT_13 33
+#define BOOT_14 34
+#define BOOT_15 35
+#define BOOT_16 36
+#define BOOT_17 37
+#define CARD_0 38
+#define CARD_1 39
+#define CARD_2 40
+#define CARD_3 41
+#define CARD_4 42
+#define CARD_5 43
+#define CARD_6 44
+#define GPIODV_0 45
+#define GPIODV_1 46
+#define GPIODV_2 47
+#define GPIODV_3 48
+#define GPIODV_4 49
+#define GPIODV_5 50
+#define GPIODV_6 51
+#define GPIODV_7 52
+#define GPIODV_8 53
+#define GPIODV_9 54
+#define GPIODV_10 55
+#define GPIODV_11 56
+#define GPIODV_12 57
+#define GPIODV_13 58
+#define GPIODV_14 59
+#define GPIODV_15 60
+#define GPIODV_16 61
+#define GPIODV_17 62
+#define GPIODV_18 63
+#define GPIODV_19 64
+#define GPIODV_20 65
+#define GPIODV_21 66
+#define GPIODV_22 67
+#define GPIODV_23 68
+#define GPIODV_24 69
+#define GPIODV_25 70
+#define GPIODV_26 71
+#define GPIODV_27 72
+#define GPIODV_28 73
+#define GPIODV_29 74
+#define GPIOY_0 75
+#define GPIOY_1 76
+#define GPIOY_2 77
+#define GPIOY_3 78
+#define GPIOY_4 79
+#define GPIOY_5 80
+#define GPIOY_6 81
+#define GPIOY_7 82
+#define GPIOY_8 83
+#define GPIOY_9 84
+#define GPIOY_10 85
+#define GPIOY_11 86
+#define GPIOY_12 87
+#define GPIOY_13 88
+#define GPIOY_14 89
+#define GPIOY_15 90
+#define GPIOY_16 91
+#define GPIOX_0 92
+#define GPIOX_1 93
+#define GPIOX_2 94
+#define GPIOX_3 95
+#define GPIOX_4 96
+#define GPIOX_5 97
+#define GPIOX_6 98
+#define GPIOX_7 99
+#define GPIOX_8 100
+#define GPIOX_9 101
+#define GPIOX_10 102
+#define GPIOX_11 103
+#define GPIOX_12 104
+#define GPIOX_13 105
+#define GPIOX_14 106
+#define GPIOX_15 107
+#define GPIOX_16 108
+#define GPIOX_17 109
+#define GPIOX_18 110
+#define GPIOX_19 111
+#define GPIOX_20 112
+#define GPIOX_21 113
+#define GPIOX_22 114
+#define GPIOCLK_0 115
+#define GPIOCLK_1 116
+#define GPIOCLK_2 117
+#define GPIOCLK_3 118
+#define GPIO_TEST_N 119
+
+#endif