diff options
author | Stephen Boyd <sboyd@kernel.org> | 2021-06-29 13:33:22 -0700 |
---|---|---|
committer | Stephen Boyd <sboyd@kernel.org> | 2021-06-29 13:33:22 -0700 |
commit | 4f47c91fc6a8f4b274d934648b53cb668c69c986 (patch) | |
tree | 3d201c3b6865778d079151e288a6fa3b17fc823a /include/dt-bindings | |
parent | e51fbc55d3d3f68a9fb37c4e95c88404c4ff244c (diff) | |
parent | bf68fdfdec6cd9a14323a61612ae9d7c510fbbdc (diff) | |
parent | 21e743300dd0b9e57425de4a9ba651493b165e03 (diff) | |
parent | fa5b6541423e7e1fb5deeacc36abea9163d23720 (diff) | |
parent | db01868f1b26378baf254c1f2c57b7deeeda7f08 (diff) | |
parent | bdbfc029374f6d9ed31bc44983501fd1008b677f (diff) | |
download | linux-4f47c91fc6a8f4b274d934648b53cb668c69c986.tar.bz2 |
Merge branches 'clk-lmk04832', 'clk-stm', 'clk-rohm', 'clk-actions' and 'clk-ingenic' into clk-next
- Texas Instruments' LMK04832 Ultra Low-Noise JESD204B Compliant Clock
Jitter Cleaner With Dual Loop PLLs
- Support secure mode of STM32MP1 SoCs
- Improve clock support for Actions S500 SoC
* clk-lmk04832:
clk: lmk04832: Use of match table
clk: lmk04832: Depend on SPI
clk: lmk04832: add support for digital delay
clk: add support for the lmk04832
dt-bindings: clock: add ti,lmk04832 bindings
* clk-stm:
clk: stm32mp1: new compatible for secure RCC support
dt-bindings: clock: stm32mp1 new compatible for secure rcc
dt-bindings: reset: add MCU HOLD BOOT ID for SCMI reset domains on stm32mp15
dt-bindings: reset: add IDs for SCMI reset domains on stm32mp15
dt-bindings: clock: add IDs for SCMI clocks on stm32mp15
reset: stm32mp1: remove stm32mp1 reset
clk: stm32mp1: move RCC reset controller into RCC clock driver
clk: stm32mp1: convert to module driver
clk: stm32mp1: remove intermediate pll clocks
clk: stm32mp1: merge 'ck_hse_rtc' and 'ck_rtc' into one clock
clk: stm32mp1: merge 'clk-hsi-div' and 'ck_hsi' into one clock
* clk-rohm:
clk: bd718xx: Drop BD70528 support
* clk-actions:
clk: actions: Add NIC and ETHERNET clock support for Actions S500 SoC
dt-bindings: clock: Add NIC and ETHERNET bindings for Actions S500 SoC
clk: actions: Fix AHPPREDIV-H-AHB clock chain on Owl S500 SoC
clk: actions: Fix bisp_factor_table based clocks on Owl S500 SoC
clk: actions: Fix SD clocks factor table on Owl S500 SoC
clk: actions: Fix UART clock dividers on Owl S500 SoC
* clk-ingenic:
clk: ingenic: Add support for the JZ4760
clk: ingenic: Support overriding PLLs M/N/OD calc algorithm
clk: ingenic: Remove pll_info.no_bypass_bit
clk: ingenic: Read bypass register only when there is one
clk: Support bypassing dividers
dt-bindings: clock: ingenic: Add ingenic,jz4760{,b}-cgu compatibles