summaryrefslogtreecommitdiffstats
path: root/include/drm
diff options
context:
space:
mode:
authorShashank Sharma <shashank.sharma@intel.com>2017-07-13 21:03:13 +0530
committerVille Syrjälä <ville.syrjala@linux.intel.com>2017-07-14 21:23:54 +0300
commite6a9a2c3dc4377f62650faf1c978d073c55d62ec (patch)
treec2f0bc9e48c50ed4b7717fd38cc60d84c0e76126 /include/drm
parent832d4f2f417d1786769c7a91a0a6363ea58cfc10 (diff)
downloadlinux-e6a9a2c3dc4377f62650faf1c978d073c55d62ec.tar.bz2
drm/edid: parse ycbcr 420 deep color information
CEA-861-F spec adds ycbcr420 deep color support information in hf-vsdb block. This patch extends the existing hf-vsdb parsing function by adding parsing of ycbcr420 deep color support from the EDID and adding it into display information stored. V2: Rebase V3: Rebase V4: Moved definition of y420_dc_modes into this patch, where its used (Ville) V5: Optimize function, if(conditions) not reqd (Ville) V6: Rebase V7: Rebase Cc: Ville Syrjälä <ville.syrjala@linux.intel.com> Cc: Jose Abreu <joabreu@synopsys.com> Signed-off-by: Shashank Sharma <shashank.sharma@intel.com> Link: http://patchwork.freedesktop.org/patch/msgid/1499960000-9232-8-git-send-email-shashank.sharma@intel.com [vsyrjala: Fix sparse indentation warn] Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/drm_connector.h3
-rw-r--r--include/drm/drm_edid.h8
2 files changed, 11 insertions, 0 deletions
diff --git a/include/drm/drm_connector.h b/include/drm/drm_connector.h
index 225e09256645..4bc088269d05 100644
--- a/include/drm/drm_connector.h
+++ b/include/drm/drm_connector.h
@@ -154,6 +154,9 @@ struct drm_hdmi_info {
/** @y420_cmdb_map: bitmap of SVD index, to extraxt vcb modes */
u64 y420_cmdb_map;
+
+ /** @y420_dc_modes: bitmap of deep color support index */
+ u8 y420_dc_modes;
};
/**
diff --git a/include/drm/drm_edid.h b/include/drm/drm_edid.h
index 89c00626d654..1e1908a6b1d6 100644
--- a/include/drm/drm_edid.h
+++ b/include/drm/drm_edid.h
@@ -213,6 +213,14 @@ struct detailed_timing {
#define DRM_EDID_HDMI_DC_30 (1 << 4)
#define DRM_EDID_HDMI_DC_Y444 (1 << 3)
+/* YCBCR 420 deep color modes */
+#define DRM_EDID_YCBCR420_DC_48 (1 << 6)
+#define DRM_EDID_YCBCR420_DC_36 (1 << 5)
+#define DRM_EDID_YCBCR420_DC_30 (1 << 4)
+#define DRM_EDID_YCBCR420_DC_MASK (DRM_EDID_YCBCR420_DC_48 | \
+ DRM_EDID_YCBCR420_DC_36 | \
+ DRM_EDID_YCBCR420_DC_30)
+
/* ELD Header Block */
#define DRM_ELD_HEADER_BLOCK_SIZE 4