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authorMaxime Ripard <maxime.ripard@bootlin.com>2019-07-22 21:24:10 +0200
committerMaxime Ripard <maxime.ripard@bootlin.com>2019-07-22 21:24:10 +0200
commit03b0f2ce735e97e9f49790d4563c82515b8fa702 (patch)
treeda561805bffd06bfba81c867f83cacb28f3a64e5 /include/drm
parente4f86e43716443e934d705952902d40de0fa9a05 (diff)
parent5f9e832c137075045d15cd6899ab0505cfb2ca4b (diff)
downloadlinux-03b0f2ce735e97e9f49790d4563c82515b8fa702.tar.bz2
Merge v5.3-rc1 into drm-misc-next
Noralf needs some SPI patches in 5.3 to merge some work on tinydrm. Signed-off-by: Maxime Ripard <maxime.ripard@bootlin.com>
Diffstat (limited to 'include/drm')
-rw-r--r--include/drm/amd_asic_type.h1
-rw-r--r--include/drm/bridge/mhl.h5
-rw-r--r--include/drm/drm_displayid.h10
-rw-r--r--include/drm/drm_dp_helper.h9
-rw-r--r--include/drm/drm_mipi_dsi.h5
-rw-r--r--include/drm/drm_modes.h2
6 files changed, 23 insertions, 9 deletions
diff --git a/include/drm/amd_asic_type.h b/include/drm/amd_asic_type.h
index dd63d08cc54e..bcc2bcf32886 100644
--- a/include/drm/amd_asic_type.h
+++ b/include/drm/amd_asic_type.h
@@ -49,6 +49,7 @@ enum amd_asic_type {
CHIP_VEGA12,
CHIP_VEGA20,
CHIP_RAVEN,
+ CHIP_NAVI10,
CHIP_LAST,
};
diff --git a/include/drm/bridge/mhl.h b/include/drm/bridge/mhl.h
index 96a5e0f6ff12..1cc77bf38324 100644
--- a/include/drm/bridge/mhl.h
+++ b/include/drm/bridge/mhl.h
@@ -1,3 +1,4 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* Defines for Mobile High-Definition Link (MHL) interface
*
@@ -6,10 +7,6 @@
*
* Based on MHL driver for Android devices.
* Copyright (C) 2013-2014 Silicon Image, Inc.
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __MHL_H__
diff --git a/include/drm/drm_displayid.h b/include/drm/drm_displayid.h
index c0d4df6a606f..9d3b745c3107 100644
--- a/include/drm/drm_displayid.h
+++ b/include/drm/drm_displayid.h
@@ -40,6 +40,7 @@
#define DATA_BLOCK_DISPLAY_INTERFACE 0x0f
#define DATA_BLOCK_STEREO_DISPLAY_INTERFACE 0x10
#define DATA_BLOCK_TILED_DISPLAY 0x12
+#define DATA_BLOCK_CTA 0x81
#define DATA_BLOCK_VENDOR_SPECIFIC 0x7f
@@ -90,4 +91,13 @@ struct displayid_detailed_timing_block {
struct displayid_block base;
struct displayid_detailed_timings_1 timings[0];
};
+
+#define for_each_displayid_db(displayid, block, idx, length) \
+ for ((block) = (struct displayid_block *)&(displayid)[idx]; \
+ (idx) + sizeof(struct displayid_block) <= (length) && \
+ (idx) + sizeof(struct displayid_block) + (block)->num_bytes <= (length) && \
+ (block)->num_bytes > 0; \
+ (idx) += (block)->num_bytes + sizeof(struct displayid_block), \
+ (block) = (struct displayid_block *)&(displayid)[idx])
+
#endif
diff --git a/include/drm/drm_dp_helper.h b/include/drm/drm_dp_helper.h
index 7e52eb81284a..397896b5b21a 100644
--- a/include/drm/drm_dp_helper.h
+++ b/include/drm/drm_dp_helper.h
@@ -249,6 +249,7 @@
#define DP_DSC_PEAK_THROUGHPUT 0x06B
# define DP_DSC_THROUGHPUT_MODE_0_MASK (0xf << 0)
# define DP_DSC_THROUGHPUT_MODE_0_SHIFT 0
+# define DP_DSC_THROUGHPUT_MODE_0_UPSUPPORTED 0
# define DP_DSC_THROUGHPUT_MODE_0_340 (1 << 0)
# define DP_DSC_THROUGHPUT_MODE_0_400 (2 << 0)
# define DP_DSC_THROUGHPUT_MODE_0_450 (3 << 0)
@@ -263,8 +264,10 @@
# define DP_DSC_THROUGHPUT_MODE_0_900 (12 << 0)
# define DP_DSC_THROUGHPUT_MODE_0_950 (13 << 0)
# define DP_DSC_THROUGHPUT_MODE_0_1000 (14 << 0)
+# define DP_DSC_THROUGHPUT_MODE_0_170 (15 << 4)
# define DP_DSC_THROUGHPUT_MODE_1_MASK (0xf << 4)
# define DP_DSC_THROUGHPUT_MODE_1_SHIFT 4
+# define DP_DSC_THROUGHPUT_MODE_1_UPSUPPORTED 0
# define DP_DSC_THROUGHPUT_MODE_1_340 (1 << 4)
# define DP_DSC_THROUGHPUT_MODE_1_400 (2 << 4)
# define DP_DSC_THROUGHPUT_MODE_1_450 (3 << 4)
@@ -279,6 +282,7 @@
# define DP_DSC_THROUGHPUT_MODE_1_900 (12 << 4)
# define DP_DSC_THROUGHPUT_MODE_1_950 (13 << 4)
# define DP_DSC_THROUGHPUT_MODE_1_1000 (14 << 4)
+# define DP_DSC_THROUGHPUT_MODE_1_170 (15 << 4)
#define DP_DSC_MAX_SLICE_WIDTH 0x06C
#define DP_DSC_MIN_SLICE_WIDTH_VALUE 2560
@@ -352,6 +356,11 @@
# define DP_FEC_CORR_BLK_ERROR_COUNT_CAP (1 << 2)
# define DP_FEC_BIT_ERROR_COUNT_CAP (1 << 3)
+/* DP Extended DSC Capabilities */
+#define DP_DSC_BRANCH_OVERALL_THROUGHPUT_0 0x0a0 /* DP 1.4a SCR */
+#define DP_DSC_BRANCH_OVERALL_THROUGHPUT_1 0x0a1
+#define DP_DSC_BRANCH_MAX_LINE_WIDTH 0x0a2
+
/* link configuration */
#define DP_LINK_BW_SET 0x100
# define DP_LINK_RATE_TABLE 0x00 /* eDP 1.4 */
diff --git a/include/drm/drm_mipi_dsi.h b/include/drm/drm_mipi_dsi.h
index 491528f48cfb..13cf2ae59f6c 100644
--- a/include/drm/drm_mipi_dsi.h
+++ b/include/drm/drm_mipi_dsi.h
@@ -1,12 +1,9 @@
+/* SPDX-License-Identifier: GPL-2.0-only */
/*
* MIPI DSI Bus
*
* Copyright (C) 2012-2013, Samsung Electronics, Co., Ltd.
* Andrzej Hajda <a.hajda@samsung.com>
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License version 2 as
- * published by the Free Software Foundation.
*/
#ifndef __DRM_MIPI_DSI_H__
diff --git a/include/drm/drm_modes.h b/include/drm/drm_modes.h
index 083f16747369..e946e20c61d8 100644
--- a/include/drm/drm_modes.h
+++ b/include/drm/drm_modes.h
@@ -537,7 +537,7 @@ void drm_connector_list_update(struct drm_connector *connector);
/* parsing cmdline modes */
bool
drm_mode_parse_command_line_for_connector(const char *mode_option,
- struct drm_connector *connector,
+ const struct drm_connector *connector,
struct drm_cmdline_mode *mode);
struct drm_display_mode *
drm_mode_create_from_cmdline_mode(struct drm_device *dev,