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authorAndi Kleen <ak@suse.de>2008-02-04 16:48:09 +0100
committerIngo Molnar <mingo@elte.hu>2008-02-04 16:48:09 +0100
commit019c3e7c5e93475002edfc0da6c59508247553b1 (patch)
tree32e1cea787829a92f5ae6207488fe9a27c7349cf /include/asm-x86
parentd4f71f7969ee2c16e2969185280c13d4f51a9172 (diff)
downloadlinux-019c3e7c5e93475002edfc0da6c59508247553b1.tar.bz2
x86: add feature macros for the gbpages cpuid bit
Signed-off-by: Andi Kleen <ak@suse.de> Signed-off-by: Ingo Molnar <mingo@elte.hu> Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86')
-rw-r--r--include/asm-x86/cpufeature.h2
1 files changed, 2 insertions, 0 deletions
diff --git a/include/asm-x86/cpufeature.h b/include/asm-x86/cpufeature.h
index 3adc9cf0f391..065e92966c7c 100644
--- a/include/asm-x86/cpufeature.h
+++ b/include/asm-x86/cpufeature.h
@@ -46,6 +46,7 @@
#define X86_FEATURE_MP (1*32+19) /* MP Capable. */
#define X86_FEATURE_NX (1*32+20) /* Execute Disable */
#define X86_FEATURE_MMXEXT (1*32+22) /* AMD MMX extensions */
+#define X86_FEATURE_GBPAGES (1*32+26) /* GB pages */
#define X86_FEATURE_RDTSCP (1*32+27) /* RDTSCP */
#define X86_FEATURE_LM (1*32+29) /* Long Mode (x86-64) */
#define X86_FEATURE_3DNOWEXT (1*32+30) /* AMD 3DNow! extensions */
@@ -179,6 +180,7 @@ extern const char * const x86_power_flags[32];
#define cpu_has_pebs boot_cpu_has(X86_FEATURE_PEBS)
#define cpu_has_clflush boot_cpu_has(X86_FEATURE_CLFLSH)
#define cpu_has_bts boot_cpu_has(X86_FEATURE_BTS)
+#define cpu_has_gbpages boot_cpu_has(X86_FEATURE_GBPAGES)
#if defined(CONFIG_X86_INVLPG) || defined(CONFIG_X86_64)
# define cpu_has_invlpg 1