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author | Robert Richter <robert.richter@amd.com> | 2008-01-30 13:30:40 +0100 |
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committer | Ingo Molnar <mingo@elte.hu> | 2008-01-30 13:30:40 +0100 |
commit | 7b83dae7aa31db4f6d6e78c3c6d490a7ac58699c (patch) | |
tree | 58196045602928d11c2688eda321738eab1dc8bc /include/asm-x86/apic.h | |
parent | 739f33b38bf88312447e38ae8b7ac3acdbb72a6b (diff) | |
download | linux-7b83dae7aa31db4f6d6e78c3c6d490a7ac58699c.tar.bz2 |
x86: extended interrupt LVT support for AMD Barcelona
Also macro definitions in apicdef.h has been updated.
Signed-off-by: Ingo Molnar <mingo@elte.hu>
Signed-off-by: Thomas Gleixner <tglx@linutronix.de>
Diffstat (limited to 'include/asm-x86/apic.h')
-rw-r--r-- | include/asm-x86/apic.h | 4 |
1 files changed, 2 insertions, 2 deletions
diff --git a/include/asm-x86/apic.h b/include/asm-x86/apic.h index 5e8192d36e5a..423022759cb2 100644 --- a/include/asm-x86/apic.h +++ b/include/asm-x86/apic.h @@ -126,8 +126,8 @@ extern void enable_NMI_through_LVT0(void *dummy); extern void setup_apic_routing(void); #endif -extern void setup_APIC_extended_lvt(unsigned char lvt_off, unsigned char vector, - unsigned char msg_type, unsigned char mask); +extern u8 setup_APIC_eilvt_mce(u8 vector, u8 msg_type, u8 mask); +extern u8 setup_APIC_eilvt_ibs(u8 vector, u8 msg_type, u8 mask); extern int apic_is_clustered_box(void); |