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authorLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
committerLinus Torvalds <torvalds@ppc970.osdl.org>2005-04-16 15:20:36 -0700
commit1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch)
tree0bba044c4ce775e45a88a51686b5d9f90697ea9d /include/asm-sparc64/smp.h
downloadlinux-1da177e4c3f41524e886b7f1b8a0c1fc7321cac2.tar.bz2
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history, even though we have it. We can create a separate "historical" git archive of that later if we want to, and in the meantime it's about 3.2GB when imported into git - space that would just make the early git days unnecessarily complicated, when we don't have a lot of good infrastructure for it. Let it rip!
Diffstat (limited to 'include/asm-sparc64/smp.h')
-rw-r--r--include/asm-sparc64/smp.h75
1 files changed, 75 insertions, 0 deletions
diff --git a/include/asm-sparc64/smp.h b/include/asm-sparc64/smp.h
new file mode 100644
index 000000000000..5e3e06d908fe
--- /dev/null
+++ b/include/asm-sparc64/smp.h
@@ -0,0 +1,75 @@
+/* smp.h: Sparc64 specific SMP stuff.
+ *
+ * Copyright (C) 1996 David S. Miller (davem@caip.rutgers.edu)
+ */
+
+#ifndef _SPARC64_SMP_H
+#define _SPARC64_SMP_H
+
+#include <linux/config.h>
+#include <linux/threads.h>
+#include <asm/asi.h>
+#include <asm/starfire.h>
+#include <asm/spitfire.h>
+
+#ifndef __ASSEMBLY__
+
+#include <linux/cpumask.h>
+#include <linux/cache.h>
+
+#endif /* !(__ASSEMBLY__) */
+
+#ifdef CONFIG_SMP
+
+#ifndef __ASSEMBLY__
+
+/*
+ * Private routines/data
+ */
+
+#include <asm/bitops.h>
+#include <asm/atomic.h>
+
+extern cpumask_t phys_cpu_present_map;
+#define cpu_possible_map phys_cpu_present_map
+
+/*
+ * General functions that each host system must provide.
+ */
+
+static __inline__ int hard_smp_processor_id(void)
+{
+ if (tlb_type == cheetah || tlb_type == cheetah_plus) {
+ unsigned long cfg, ver;
+ __asm__ __volatile__("rdpr %%ver, %0" : "=r" (ver));
+ if ((ver >> 32) == 0x003e0016) {
+ __asm__ __volatile__("ldxa [%%g0] %1, %0"
+ : "=r" (cfg)
+ : "i" (ASI_JBUS_CONFIG));
+ return ((cfg >> 17) & 0x1f);
+ } else {
+ __asm__ __volatile__("ldxa [%%g0] %1, %0"
+ : "=r" (cfg)
+ : "i" (ASI_SAFARI_CONFIG));
+ return ((cfg >> 17) & 0x3ff);
+ }
+ } else if (this_is_starfire != 0) {
+ return starfire_hard_smp_processor_id();
+ } else {
+ unsigned long upaconfig;
+ __asm__ __volatile__("ldxa [%%g0] %1, %0"
+ : "=r" (upaconfig)
+ : "i" (ASI_UPA_CONFIG));
+ return ((upaconfig >> 17) & 0x1f);
+ }
+}
+
+#define smp_processor_id() (current_thread_info()->cpu)
+
+#endif /* !(__ASSEMBLY__) */
+
+#endif /* !(CONFIG_SMP) */
+
+#define NO_PROC_ID 0xFF
+
+#endif /* !(_SPARC64_SMP_H) */