diff options
author | Jeremy Kerr <jk@ozlabs.org> | 2007-12-20 16:39:59 +0900 |
---|---|---|
committer | Paul Mackerras <paulus@samba.org> | 2007-12-21 19:46:20 +1100 |
commit | d6ad39bc53521275d14fde86bfb94d9b2ddb7a08 (patch) | |
tree | 07dcc592b343395cb7fbfb3053aa21103fb94352 /include/asm-powerpc/spu_csa.h | |
parent | 8af30675c3e7b945bbaf6f57b724f246e56eb209 (diff) | |
download | linux-d6ad39bc53521275d14fde86bfb94d9b2ddb7a08.tar.bz2 |
[POWERPC] spufs: rework class 0 and 1 interrupt handling
Based on original patches from
Arnd Bergmann <arnd.bergman@de.ibm.com>; and
Luke Browning <lukebr@linux.vnet.ibm.com>
Currently, spu contexts need to be loaded to the SPU in order to take
class 0 and class 1 exceptions.
This change makes the actual interrupt-handlers much simpler (ie,
set the exception information in the context save area), and defers the
handling code to the spufs_handle_class[01] functions, called from
spufs_run_spu.
This should improve the concurrency of the spu scheduling leading to
greater SPU utilization when SPUs are overcommited.
Signed-off-by: Jeremy Kerr <jk@ozlabs.org>
Signed-off-by: Paul Mackerras <paulus@samba.org>
Diffstat (limited to 'include/asm-powerpc/spu_csa.h')
-rw-r--r-- | include/asm-powerpc/spu_csa.h | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/include/asm-powerpc/spu_csa.h b/include/asm-powerpc/spu_csa.h index 34da5c685170..0ab6bff86078 100644 --- a/include/asm-powerpc/spu_csa.h +++ b/include/asm-powerpc/spu_csa.h @@ -254,7 +254,7 @@ struct spu_state { u64 spu_chnldata_RW[32]; u32 spu_mailbox_data[4]; u32 pu_mailbox_data[1]; - u64 dar, dsisr; + u64 dar, dsisr, class_0_pending; unsigned long suspend_time; spinlock_t register_lock; }; |