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authorGrant Grundler <grundler@parisc-linux.org>2005-10-21 22:40:24 -0400
committerKyle McMartin <kyle@parisc-linux.org>2005-10-21 22:40:24 -0400
commit04d472dc83388c59deb6241e9aed841926aa1c8c (patch)
treeb6ebff62c0f62416f9c84bb24e1d6b2901661e02 /include/asm-parisc
parent896a375623c3643a3f189353e7d4828c48a7fdf8 (diff)
downloadlinux-04d472dc83388c59deb6241e9aed841926aa1c8c.tar.bz2
[PARISC] Move pa_tlb_lock to tlb_flush.h
move pa_tlb_lock and it's primary consumers to tlb_flush.h Future step will be to move spinlock_t definition out of system.h. Signed-off-by: Grant Grundler <grundler@parisc-linux.org> Signed-off-by: Kyle McMartin <kyle@parisc-linux.org>
Diffstat (limited to 'include/asm-parisc')
-rw-r--r--include/asm-parisc/system.h19
-rw-r--r--include/asm-parisc/tlbflush.h20
2 files changed, 20 insertions, 19 deletions
diff --git a/include/asm-parisc/system.h b/include/asm-parisc/system.h
index 26ff844a21c1..a25e9dcd2e79 100644
--- a/include/asm-parisc/system.h
+++ b/include/asm-parisc/system.h
@@ -164,25 +164,6 @@ static inline void set_eiem(unsigned long val)
#endif
#define KERNEL_START (0x10100000 - 0x1000)
-
-/* This is for the serialisation of PxTLB broadcasts. At least on the
- * N class systems, only one PxTLB inter processor broadcast can be
- * active at any one time on the Merced bus. This tlb purge
- * synchronisation is fairly lightweight and harmless so we activate
- * it on all SMP systems not just the N class. */
-#ifdef CONFIG_SMP
-extern spinlock_t pa_tlb_lock;
-
-#define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
-#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
-
-#else
-
-#define purge_tlb_start(x) do { } while(0)
-#define purge_tlb_end(x) do { } while (0)
-
-#endif
-
#define arch_align_stack(x) (x)
#endif
diff --git a/include/asm-parisc/tlbflush.h b/include/asm-parisc/tlbflush.h
index efbb2d8625b1..84af4ab1fe51 100644
--- a/include/asm-parisc/tlbflush.h
+++ b/include/asm-parisc/tlbflush.h
@@ -7,6 +7,26 @@
#include <linux/mm.h>
#include <asm/mmu_context.h>
+
+/* This is for the serialisation of PxTLB broadcasts. At least on the
+ * N class systems, only one PxTLB inter processor broadcast can be
+ * active at any one time on the Merced bus. This tlb purge
+ * synchronisation is fairly lightweight and harmless so we activate
+ * it on all SMP systems not just the N class. */
+#ifdef CONFIG_SMP
+extern spinlock_t pa_tlb_lock;
+
+#define purge_tlb_start(x) spin_lock(&pa_tlb_lock)
+#define purge_tlb_end(x) spin_unlock(&pa_tlb_lock)
+
+#else
+
+#define purge_tlb_start(x) do { } while(0)
+#define purge_tlb_end(x) do { } while (0)
+
+#endif
+
+
extern void flush_tlb_all(void);
/*