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authorAtsushi Nemoto <anemo@mba.ocn.ne.jp>2007-08-02 23:35:53 +0900
committerRalf Baechle <ralf@linux-mips.org>2007-08-27 02:16:52 +0100
commit8420fd00e88ef4f6082866aa151bc753b006b3b6 (patch)
tree6d4badf14729e256936d983f7f6fe70e4858bf38 /include/asm-mips
parent477f949e0ad7f1d3503a87b9f158d70c29abc918 (diff)
downloadlinux-8420fd00e88ef4f6082866aa151bc753b006b3b6.tar.bz2
[MIPS] The irq_chip for TX39/TX49 SoCs
Add generic irq_chip for TX39/TX49 SoCs. This can be replace jmr3927_irq_irc, tx4927_irq_pic_type and tx4938_irq_pic_type. Signed-off-by: Atsushi Nemoto <anemo@mba.ocn.ne.jp> Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips')
-rw-r--r--include/asm-mips/txx9irq.h30
1 files changed, 30 insertions, 0 deletions
diff --git a/include/asm-mips/txx9irq.h b/include/asm-mips/txx9irq.h
new file mode 100644
index 000000000000..1c439e51b875
--- /dev/null
+++ b/include/asm-mips/txx9irq.h
@@ -0,0 +1,30 @@
+/*
+ * include/asm-mips/txx9irq.h
+ * TX39/TX49 interrupt controller definitions.
+ *
+ * This file is subject to the terms and conditions of the GNU General Public
+ * License. See the file "COPYING" in the main directory of this archive
+ * for more details.
+ */
+#ifndef __ASM_TXX9IRQ_H
+#define __ASM_TXX9IRQ_H
+
+#include <irq.h>
+
+#ifdef CONFIG_IRQ_CPU
+#define TXX9_IRQ_BASE (MIPS_CPU_IRQ_BASE + 8)
+#else
+#define TXX9_IRQ_BASE 0
+#endif
+
+#ifdef CONFIG_CPU_TX39XX
+#define TXx9_MAX_IR 16
+#else
+#define TXx9_MAX_IR 32
+#endif
+
+void txx9_irq_init(unsigned long baseaddr);
+int txx9_irq(void);
+int txx9_irq_set_pri(int irc_irq, int new_pri);
+
+#endif /* __ASM_TXX9IRQ_H */