diff options
| author | Ralf Baechle <ralf@linux-mips.org> | 2005-12-22 13:41:29 +0100 |
|---|---|---|
| committer | <ralf@denk.linux-mips.net> | 2006-01-10 13:39:08 +0000 |
| commit | 7043ad4f4c81914ca9e2cd2208c8f4801ed63735 (patch) | |
| tree | cbc3d8384665ffc1bf02bac46827097ed5cd0b68 /include/asm-mips/hazards.h | |
| parent | 15265251c5c68fbabdf561cf704e3e305349715a (diff) | |
| download | linux-7043ad4f4c81914ca9e2cd2208c8f4801ed63735.tar.bz2 | |
MIPS: R2: Try to bulletproof instruction_hazard against miss-compilation.
Gcc has a tradition of misscompiling the previous construct using the
address of a label as argument to inline assembler. Gas otoh has the
annoying difference between la and dla which are only usable for 32-bit
rsp. 64-bit code, so can't be used without conditional compilation.
The alterantive is switching the assembler to 64-bit code which happens
to work right even for 32-bit code ...
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'include/asm-mips/hazards.h')
| -rw-r--r-- | include/asm-mips/hazards.h | 20 |
1 files changed, 15 insertions, 5 deletions
diff --git a/include/asm-mips/hazards.h b/include/asm-mips/hazards.h index 7517189e469f..2fc90632f88c 100644 --- a/include/asm-mips/hazards.h +++ b/include/asm-mips/hazards.h @@ -233,15 +233,25 @@ __asm__( #endif #ifdef CONFIG_CPU_MIPSR2 +/* + * gcc has a tradition of misscompiling the previous construct using the + * address of a label as argument to inline assembler. Gas otoh has the + * annoying difference between la and dla which are only usable for 32-bit + * rsp. 64-bit code, so can't be used without conditional compilation. + * The alterantive is switching the assembler to 64-bit code which happens + * to work right even for 32-bit code ... + */ #define instruction_hazard() \ do { \ -__label__ __next; \ + unsigned long tmp; \ + \ __asm__ __volatile__( \ + " .set mips64r2 \n" \ + " dla %0, 1f \n" \ " jr.hb %0 \n" \ - : \ - : "r" (&&__next)); \ -__next: \ - ; \ + " .set mips0 \n" \ + "1: \n" \ + : "=r" (tmp)); \ } while (0) #else |