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authorAl Viro <viro@ftp.linux.org.uk>2007-01-30 13:23:55 +0000
committerLinus Torvalds <torvalds@woody.linux-foundation.org>2007-01-30 08:39:20 -0800
commitd0a23398eeaa374eb0c0435c5a259ffde77c8af0 (patch)
tree5f309fc728260f6a0e4f56dca4a04ee6c4cf8b8d /include/asm-alpha
parent161c888b0b4d28775dfe35274ee90c16a91b4365 (diff)
downloadlinux-d0a23398eeaa374eb0c0435c5a259ffde77c8af0.tar.bz2
[PATCH] missing dma_sync_single_range_for{cpu,device} on alpha
no-op as all dma_sync_... there. Signed-off-by: Al Viro <viro@zeniv.linux.org.uk> Signed-off-by: Linus Torvalds <torvalds@linux-foundation.org>
Diffstat (limited to 'include/asm-alpha')
-rw-r--r--include/asm-alpha/dma-mapping.h14
1 files changed, 8 insertions, 6 deletions
diff --git a/include/asm-alpha/dma-mapping.h b/include/asm-alpha/dma-mapping.h
index 57e09f5e3424..1919d72f4c7a 100644
--- a/include/asm-alpha/dma-mapping.h
+++ b/include/asm-alpha/dma-mapping.h
@@ -55,12 +55,14 @@ int dma_map_sg(struct device *dev, struct scatterlist *sg, int nents,
int dma_set_mask(struct device *dev, u64 mask);
-#define dma_sync_single_for_cpu(dev, addr, size, dir) do { } while (0)
-#define dma_sync_single_for_device(dev, addr, size, dir) do { } while (0)
-#define dma_sync_single_range(dev, addr, off, size, dir) do { } while (0)
-#define dma_sync_sg_for_cpu(dev, sg, nents, dir) do { } while (0)
-#define dma_sync_sg_for_device(dev, sg, nents, dir) do { } while (0)
-#define dma_cache_sync(dev, va, size, dir) do { } while (0)
+#define dma_sync_single_for_cpu(dev, addr, size, dir) ((void)0)
+#define dma_sync_single_for_device(dev, addr, size, dir) ((void)0)
+#define dma_sync_single_range(dev, addr, off, size, dir) ((void)0)
+#define dma_sync_sg_for_cpu(dev, sg, nents, dir) ((void)0)
+#define dma_sync_sg_for_device(dev, sg, nents, dir) ((void)0)
+#define dma_cache_sync(dev, va, size, dir) ((void)0)
+#define dma_sync_single_range_for_cpu(dev, addr, offset, size, dir) ((void)0)
+#define dma_sync_single_range_for_device(dev, addr, offset, size, dir) ((void)0)
#define dma_get_cache_alignment() L1_CACHE_BYTES