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authorHeiko Stuebner <heiko@sntech.de>2017-03-01 22:00:41 +0100
committerStephen Boyd <sboyd@codeaurora.org>2017-03-07 05:54:49 -0800
commit9b1b23f03abdd25ffde8bbfe5824b89bc0448c28 (patch)
tree8b4ace16d0b8be6827e26f0dd9e15195b32eb957 /fs/qnx4
parent253160a8ad06bcc1c1db16a58b1f06d5128f6c5e (diff)
downloadlinux-9b1b23f03abdd25ffde8bbfe5824b89bc0448c28.tar.bz2
clk: rockchip: add "," to mux_pll_src_apll_dpll_gpll_usb480m_p on rk3036
The mux_pll_src_apll_dpll_gpll_usb480m_p parent list was missing a "," between the 3rd and 4th parent names, making them fall together and thus lookups fail. Fix that. Fixes: 5190c08b2989 ("clk: rockchip: add clock controller for rk3036") Signed-off-by: Heiko Stuebner <heiko@sntech.de> Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
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