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authorJames Hogan <james.hogan@imgtec.com>2012-10-09 10:54:47 +0100
committerJames Hogan <james.hogan@imgtec.com>2013-03-02 20:09:48 +0000
commit5698c50d9da4ab2f57d98c64ea97675dcaf2a608 (patch)
tree5b82a24daa8bbb85703489340cbfdcb00a2f20a4 /fs/ocfs2
parent63047ea36070d11f902ab7d09a5a18aea037c0f7 (diff)
downloadlinux-5698c50d9da4ab2f57d98c64ea97675dcaf2a608.tar.bz2
metag: Internal and external irqchips
Meta core internal interrupts (from HWSTATMETA and friends) are vectored onto the TR1 core trigger for the current thread. This is demultiplexed in irq-metag.c to individual Linux IRQs for each internal interrupt. External SoC interrupts (from HWSTATEXT and friends) are vectored onto the TR2 core trigger for the current thread. This is demultiplexed in irq-metag-ext.c to individual Linux IRQs for each external SoC interrupt. The external irqchip has devicetree bindings for configuring the number of irq banks and the type of masking available. Signed-off-by: James Hogan <james.hogan@imgtec.com> Cc: Arnd Bergmann <arnd@arndb.de> Cc: Grant Likely <grant.likely@secretlab.ca> Cc: Rob Herring <rob.herring@calxeda.com> Cc: Rob Landley <rob@landley.net> Cc: Dom Cobley <popcornmix@gmail.com> Cc: Simon Arlott <simon@fire.lp0.eu> Cc: Viresh Kumar <viresh.kumar@linaro.org> Cc: Maxime Ripard <maxime.ripard@free-electrons.com> Cc: devicetree-discuss@lists.ozlabs.org Cc: linux-doc@vger.kernel.org
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