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author | Takeshi Kihara <takeshi.kihara.df@renesas.com> | 2017-07-13 01:55:47 +0900 |
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committer | Geert Uytterhoeven <geert+renesas@glider.be> | 2017-07-17 11:02:44 +0200 |
commit | bf1a8aa0a2d6b0a6d8736de7ac07c886b092cbad (patch) | |
tree | ead7382d99aeeefb6f7c9f9afe987d2a863bb417 /fs/isofs | |
parent | 78864ed5f3a743a36e9000db94709eca960efdcb (diff) | |
download | linux-bf1a8aa0a2d6b0a6d8736de7ac07c886b092cbad.tar.bz2 |
pinctrl: sh-pfc: r8a7796: Rename CS1# pin function definitions
This patch renames the pin function macro definitions of the GPSR1 and
IPSR4 registers value for the CS1# pin.
This is a correction because GPSR and IPSR register specification for
R8A7796 SoC was changed in R-Car Gen3 Hardware User's Manual Rev.0.54E.
Fixes: f9aece7344bd81ce ("pinctrl: sh-pfc: Initial R8A7796 PFC support")
Signed-off-by: Takeshi Kihara <takeshi.kihara.df@renesas.com>
Signed-off-by: Yoshihiro Kaneko <ykaneko0929@gmail.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Diffstat (limited to 'fs/isofs')
0 files changed, 0 insertions, 0 deletions