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authorWill Deacon <will.deacon@arm.com>2013-09-04 12:30:08 +0100
committerWill Deacon <will.deacon@arm.com>2014-10-20 18:49:18 +0100
commita8e0aead70b4af957e6b27b82fba849c6179b707 (patch)
tree2127e811b50ddf23f21ae678abc129b34e52ded7 /fs/dlm/lvb_table.h
parentcbc908ef8e6babc40cb929f46ea1b8a26cbdbce0 (diff)
downloadlinux-a8e0aead70b4af957e6b27b82fba849c6179b707.tar.bz2
documentation: memory-barriers: clarify relaxed io accessor semantics
This patch extends the paragraph describing the relaxed read io accessors so that the relaxed accessors are defined to be: - Ordered with respect to each other if accessing the same peripheral - Unordered with respect to normal memory accesses - Unordered with respect to LOCK/UNLOCK operations Whilst many architectures will provide stricter semantics, ARM, Alpha and PPC can achieve significant performance gains by taking advantage of some or all of the above relaxations. Cc: Randy Dunlap <rdunlap@infradead.org> Cc: Benjamin Herrenschmidt <benh@kernel.crashing.org> Cc: Paul E. McKenney <paulmck@linux.vnet.ibm.com> Cc: David Howells <dhowells@redhat.com> Signed-off-by: Will Deacon <will.deacon@arm.com>
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