diff options
| author | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2016-05-17 13:31:14 +0300 |
|---|---|---|
| committer | Tomi Valkeinen <tomi.valkeinen@ti.com> | 2016-05-19 20:19:03 +0300 |
| commit | be5d7319543477eb279c184e22b380ba5616b079 (patch) | |
| tree | 3bd58b0cc11289e9c13fa78de5427bfe8623754a /drivers | |
| parent | 50c0164a6eb2e788a29dd391510e2349dad076dd (diff) | |
| download | linux-be5d7319543477eb279c184e22b380ba5616b079.tar.bz2 | |
drm/omap: copy enum omap_dss_clk_source
At the moment 'enum omap_dss_clk_source' is in omapdss.h, shared by
omapdrm and omapfb. We're about to improve the omapdrm clock code, so we
need to make a separate copy of the enum for each driver.
Signed-off-by: Tomi Valkeinen <tomi.valkeinen@ti.com>
Diffstat (limited to 'drivers')
| -rw-r--r-- | drivers/gpu/drm/omapdrm/dss/dss.h | 11 | ||||
| -rw-r--r-- | drivers/video/fbdev/omap2/omapfb/dss/dss.h | 11 |
2 files changed, 22 insertions, 0 deletions
diff --git a/drivers/gpu/drm/omapdrm/dss/dss.h b/drivers/gpu/drm/omapdrm/dss/dss.h index 38e6ab50142d..c35245c0fdc7 100644 --- a/drivers/gpu/drm/omapdrm/dss/dss.h +++ b/drivers/gpu/drm/omapdrm/dss/dss.h @@ -102,6 +102,17 @@ enum dss_writeback_channel { DSS_WB_LCD3_MGR = 7, }; +enum omap_dss_clk_source { + OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK + * OMAP4: DSS_FCLK */ + OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK + * OMAP4: PLL1_CLK1 */ + OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK + * OMAP4: PLL1_CLK2 */ + OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */ + OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */ +}; + enum dss_pll_id { DSS_PLL_DSI1, DSS_PLL_DSI2, diff --git a/drivers/video/fbdev/omap2/omapfb/dss/dss.h b/drivers/video/fbdev/omap2/omapfb/dss/dss.h index 0184a8461df1..a3cc0ca8f9d2 100644 --- a/drivers/video/fbdev/omap2/omapfb/dss/dss.h +++ b/drivers/video/fbdev/omap2/omapfb/dss/dss.h @@ -73,6 +73,17 @@ #define FLD_MOD(orig, val, start, end) \ (((orig) & ~FLD_MASK(start, end)) | FLD_VAL(val, start, end)) +enum omap_dss_clk_source { + OMAP_DSS_CLK_SRC_FCK = 0, /* OMAP2/3: DSS1_ALWON_FCLK + * OMAP4: DSS_FCLK */ + OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DISPC, /* OMAP3: DSI1_PLL_FCLK + * OMAP4: PLL1_CLK1 */ + OMAP_DSS_CLK_SRC_DSI_PLL_HSDIV_DSI, /* OMAP3: DSI2_PLL_FCLK + * OMAP4: PLL1_CLK2 */ + OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DISPC, /* OMAP4: PLL2_CLK1 */ + OMAP_DSS_CLK_SRC_DSI2_PLL_HSDIV_DSI, /* OMAP4: PLL2_CLK2 */ +}; + enum dss_io_pad_mode { DSS_IO_PAD_MODE_RESET, DSS_IO_PAD_MODE_RFBI, |