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authorBjorn Helgaas <bhelgaas@google.com>2017-04-28 10:33:05 -0500
committerBjorn Helgaas <bhelgaas@google.com>2017-04-28 10:33:05 -0500
commit443b1b06717275a10f4b36fb6330c85b7f37281f (patch)
tree9e57a779d70975ca6345089111d34e7afd0c1221 /drivers
parent24c53a66bd687a186f55f0845c08a6d073864798 (diff)
parentb8e82c1bdd2871dc9c704502acc2ca634b51eeda (diff)
downloadlinux-443b1b06717275a10f4b36fb6330c85b7f37281f.tar.bz2
Merge branch 'pci/host-mvebu' into next
* pci/host-mvebu: PCI: mvebu: Avoid changing the SCC bit in the Link Status register
Diffstat (limited to 'drivers')
-rw-r--r--drivers/pci/host/pci-mvebu.c5
1 files changed, 3 insertions, 2 deletions
diff --git a/drivers/pci/host/pci-mvebu.c b/drivers/pci/host/pci-mvebu.c
index cd7d51988738..266447ee8867 100644
--- a/drivers/pci/host/pci-mvebu.c
+++ b/drivers/pci/host/pci-mvebu.c
@@ -752,10 +752,11 @@ static int mvebu_sw_pci_bridge_write(struct mvebu_pcie_port *port,
* If the mask is 0xffff0000, then we only want to write
* the link control register, rather than clearing the
* RW1C bits in the link status register. Mask out the
- * status register bits.
+ * RW1C status register bits.
*/
if (mask == 0xffff0000)
- value &= 0xffff;
+ value &= ~((PCI_EXP_LNKSTA_LABS |
+ PCI_EXP_LNKSTA_LBMS) << 16);
mvebu_writel(port, value, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
break;